| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/arm/include/asm/ |
| H A D | cache.h | 23 #define ARCH_SLAB_MINALIGN 8 macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/arm/include/asm/ |
| H A D | cache.h | 23 #define ARCH_SLAB_MINALIGN 8 macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/include/linux/ |
| H A D | slob_def.h | 10 #ifndef ARCH_SLAB_MINALIGN
11 #define ARCH_SLAB_MINALIGN __alignof__(unsigned long) macro
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| H A D | slab_def.h | 35 #ifndef ARCH_SLAB_MINALIGN
43 #define ARCH_SLAB_MINALIGN 0 macro
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| H A D | slub_def.h | 123 #ifndef ARCH_SLAB_MINALIGN
124 #define ARCH_SLAB_MINALIGN __alignof__(unsigned long long) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/include/linux/ |
| H A D | slob_def.h | 10 #ifndef ARCH_SLAB_MINALIGN
11 #define ARCH_SLAB_MINALIGN __alignof__(unsigned long) macro
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| H A D | slab_def.h | 35 #ifndef ARCH_SLAB_MINALIGN
43 #define ARCH_SLAB_MINALIGN 0 macro
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| H A D | slub_def.h | 123 #ifndef ARCH_SLAB_MINALIGN
124 #define ARCH_SLAB_MINALIGN __alignof__(unsigned long long) macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/frv/include/asm/ |
| H A D | mem-layout.h | 39 #define ARCH_SLAB_MINALIGN L1_CACHE_BYTES macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/frv/include/asm/ |
| H A D | mem-layout.h | 39 #define ARCH_SLAB_MINALIGN L1_CACHE_BYTES macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sparc/include/asm/ |
| H A D | cache.h | 10 #define ARCH_SLAB_MINALIGN __alignof__(unsigned long long) macro
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sparc/include/asm/ |
| H A D | cache.h | 10 #define ARCH_SLAB_MINALIGN __alignof__(unsigned long long) macro
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/xtensa/include/asm/ |
| H A D | processor.h | 28 #define ARCH_SLAB_MINALIGN XCHAL_DATA_WIDTH macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/xtensa/include/asm/ |
| H A D | processor.h | 28 #define ARCH_SLAB_MINALIGN XCHAL_DATA_WIDTH macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/mm/ |
| H A D | slob.c | 482 int align = max(ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN);
531 int align = max(ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN);
550 int align = max(ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN);
584 if (c->align < ARCH_SLAB_MINALIGN)
585 c->align = ARCH_SLAB_MINALIGN;
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| H A D | slab.c | 2277 if (ralign < ARCH_SLAB_MINALIGN) {
2278 ralign = ARCH_SLAB_MINALIGN;
3147 #if ARCH_SLAB_MINALIGN
3148 if ((u32)objp & (ARCH_SLAB_MINALIGN-1)) {
3149 printk(KERN_ERR "0x%p: not aligned to ARCH_SLAB_MINALIGN=%d\n",
3150 objp, ARCH_SLAB_MINALIGN);
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| H A D | slub.c | 2050 if (align < ARCH_SLAB_MINALIGN)
2051 align = ARCH_SLAB_MINALIGN;
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/mm/ |
| H A D | slob.c | 482 int align = max(ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN);
531 int align = max(ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN);
550 int align = max(ARCH_KMALLOC_MINALIGN, ARCH_SLAB_MINALIGN);
584 if (c->align < ARCH_SLAB_MINALIGN)
585 c->align = ARCH_SLAB_MINALIGN;
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| H A D | slab.c | 2277 if (ralign < ARCH_SLAB_MINALIGN) {
2278 ralign = ARCH_SLAB_MINALIGN;
3147 #if ARCH_SLAB_MINALIGN
3148 if ((u32)objp & (ARCH_SLAB_MINALIGN-1)) {
3149 printk(KERN_ERR "0x%p: not aligned to ARCH_SLAB_MINALIGN=%d\n",
3150 objp, ARCH_SLAB_MINALIGN);
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/sh/include/asm/ |
| H A D | page.h | 193 #define ARCH_SLAB_MINALIGN 8 macro
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/sh/include/asm/ |
| H A D | page.h | 193 #define ARCH_SLAB_MINALIGN 8 macro
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| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/arch/microblaze/include/asm/ |
| H A D | page.h | 45 #define ARCH_SLAB_MINALIGN L1_CACHE_BYTES macro
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/arch/microblaze/include/asm/ |
| H A D | page.h | 45 #define ARCH_SLAB_MINALIGN L1_CACHE_BYTES macro
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6.36/fs/ |
| H A D | binfmt_flat.c | 68 #define FLAT_STACK_ALIGN max_t(unsigned long, sizeof(void *), ARCH_SLAB_MINALIGN)
|
| /asuswrt-rt-n18u-9.0.0.4.380.2695/release/src-rt-6.x.4708/linux/linux-2.6/fs/ |
| H A D | binfmt_flat.c | 68 #define FLAT_STACK_ALIGN max_t(unsigned long, sizeof(void *), ARCH_SLAB_MINALIGN)
|