/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-ppc64/iSeries/ |
H A D | HvCallSc.h | 36 u64 HvCall0( u64 ); 37 u64 HvCall1( u64, u64 ); 38 u64 HvCall2( u64, u64, u64 ); 39 u64 HvCall [all...] |
H A D | LparMap.h | 59 u64 xNumberEsids; // Number of ESID/VSID pairs (1) 60 u64 xNumberRanges; // Number of VA ranges to map (1) 61 u64 xSegmentTableOffs; // Page number within load area of seg table (0) 62 u64 xRsvd[5]; // Reserved (0) 63 u64 xKernelEsid; // Esid used to map kernel load (0x0C00000000) 64 u64 xKernelVsid; // Vsid used to map kernel load (0x0C00000000) 65 u64 xPages; // Number of pages to be mapped (8192) 66 u64 xOffset; // Offset from start of load area (0) 67 u64 xVPN; // Virtual Page Number (0x000C000000000000)
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H A D | HvCallXm.h | 49 static inline void HvCallXm_getTceTableParms(u64 cb) 55 static inline u64 HvCallXm_setTce(u64 tceTableToken, u64 tceOffset, u64 tce) 57 u64 retval = HvCall3(HvCallXmSetTce, tceTableToken, tceOffset, tce ); 62 static inline u64 HvCallXm_setTces(u64 tceTableToken, u64 tceOffset, u64 numTce [all...] |
H A D | ItLpRegSave.h | 43 u64 xMMCR0; // Monitor Mode Control Reg 0 180-187 60 u64 xACCR; // Address Compare Control Reg 1C0-1C7 61 u64 xIMR; // Instruction Match Register 1C8-1CF 62 u64 xSDR1; // Storage Description Reg 1 1D0-1D7 63 u64 xSPRG0; // Special Purpose Reg General0 1D8-1DF 64 u64 xSPRG1; // Special Purpose Reg General1 1E0-1E7 65 u64 xSPRG2; // Special Purpose Reg General2 1E8-1EF 66 u64 xSPRG3; // Special Purpose Reg General3 1F0-1F7 67 u64 xTB; // Time Base Register 1F8-1FF 69 u64 xFP [all...] |
H A D | iSeries_dma.h | 42 u64 wholeTce; 44 u64 cacheBits :6; /* Cache hash bits - not used */ 45 u64 rsvd :6; 46 u64 rpn :40; /* Absolute page number */ 47 u64 valid :1; /* Tce is valid (vb only) */ 48 u64 allIo :1; /* Tce is valid for all lps (vb only) */ 49 u64 lpIndex :8; /* LpIndex for user of TCE (vb only) */ 50 u64 pciWrite :1; /* Write allowed (pci only) */ 51 u64 readWrite :1; /* Read allowed (pci), Write allowed 68 u64 busNumbe [all...] |
H A D | ItSpCommArea.h | 30 u64 xRawTbAtIplStart; // Raw HW TB value when IPL is started 010-017 31 u64 xRawTodAtIplStart; // Raw HW TOD value when IPL is started 018-01F 32 u64 xBcdTimeAtIplStart; // BCD time when IPL is started 020-027 33 u64 xBcdTimeAtOsStart; // BCD time when OS passed control 028-02F
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/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-ppc64/iSeries/ |
H A D | HvCallSc.h | 36 u64 HvCall0( u64 ); 37 u64 HvCall1( u64, u64 ); 38 u64 HvCall2( u64, u64, u64 ); 39 u64 HvCall [all...] |
H A D | LparMap.h | 59 u64 xNumberEsids; // Number of ESID/VSID pairs (1) 60 u64 xNumberRanges; // Number of VA ranges to map (1) 61 u64 xSegmentTableOffs; // Page number within load area of seg table (0) 62 u64 xRsvd[5]; // Reserved (0) 63 u64 xKernelEsid; // Esid used to map kernel load (0x0C00000000) 64 u64 xKernelVsid; // Vsid used to map kernel load (0x0C00000000) 65 u64 xPages; // Number of pages to be mapped (8192) 66 u64 xOffset; // Offset from start of load area (0) 67 u64 xVPN; // Virtual Page Number (0x000C000000000000)
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H A D | HvCallXm.h | 49 static inline void HvCallXm_getTceTableParms(u64 cb) 55 static inline u64 HvCallXm_setTce(u64 tceTableToken, u64 tceOffset, u64 tce) 57 u64 retval = HvCall3(HvCallXmSetTce, tceTableToken, tceOffset, tce ); 62 static inline u64 HvCallXm_setTces(u64 tceTableToken, u64 tceOffset, u64 numTce [all...] |
H A D | ItLpRegSave.h | 43 u64 xMMCR0; // Monitor Mode Control Reg 0 180-187 60 u64 xACCR; // Address Compare Control Reg 1C0-1C7 61 u64 xIMR; // Instruction Match Register 1C8-1CF 62 u64 xSDR1; // Storage Description Reg 1 1D0-1D7 63 u64 xSPRG0; // Special Purpose Reg General0 1D8-1DF 64 u64 xSPRG1; // Special Purpose Reg General1 1E0-1E7 65 u64 xSPRG2; // Special Purpose Reg General2 1E8-1EF 66 u64 xSPRG3; // Special Purpose Reg General3 1F0-1F7 67 u64 xTB; // Time Base Register 1F8-1FF 69 u64 xFP [all...] |
H A D | iSeries_dma.h | 42 u64 wholeTce; 44 u64 cacheBits :6; /* Cache hash bits - not used */ 45 u64 rsvd :6; 46 u64 rpn :40; /* Absolute page number */ 47 u64 valid :1; /* Tce is valid (vb only) */ 48 u64 allIo :1; /* Tce is valid for all lps (vb only) */ 49 u64 lpIndex :8; /* LpIndex for user of TCE (vb only) */ 50 u64 pciWrite :1; /* Write allowed (pci only) */ 51 u64 readWrite :1; /* Read allowed (pci), Write allowed 68 u64 busNumbe [all...] |
H A D | ItSpCommArea.h | 30 u64 xRawTbAtIplStart; // Raw HW TB value when IPL is started 010-017 31 u64 xRawTodAtIplStart; // Raw HW TOD value when IPL is started 018-01F 32 u64 xBcdTimeAtIplStart; // BCD time when IPL is started 020-027 33 u64 xBcdTimeAtOsStart; // BCD time when OS passed control 028-02F
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/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-ppc64/ |
H A D | naca.h | 23 u64 xRamDiskSize; /* In pages 0x10 */ 25 u64 debug_switch; /* Debug print control 0x20 */ 26 u64 banner; /* Ptr to banner string 0x28 */ 27 u64 log; /* Ptr to log buffer 0x30 */ 28 u64 serialPortAddr; /* Phy addr of serial port 0x38 */ 29 u64 interrupt_controller; /* Type of int controller 0x40 */ 30 u64 slb_size; /* SLB size in entries 0x48 */ 31 u64 pftSize; /* Log 2 of page table size 0x50 */ 32 u64 resv0[5]; /* Reserved 0x58 - 0x7F */ 44 u64 physicalMemorySiz [all...] |
H A D | pci_dma.h | 43 u64 wholeTce; 45 u64 cacheBits :6; /* Cache hash bits - not used */ 46 u64 rsvd :6; 47 u64 rpn :40; /* Absolute page number */ 48 u64 valid :1; /* Tce is valid (vb only) */ 49 u64 allIo :1; /* Tce is valid for all lps (vb only) */ 50 u64 lpIndex :8; /* LpIndex for user of TCE (vb only) */ 51 u64 pciWrite :1; /* Write allowed (pci only) */ 52 u64 readWrite :1; /* Read allowed (pci), Write allowed (vb) */ 68 u64 busNumbe [all...] |
H A D | pmc.h | 40 u64 mmcr0; 41 u64 mmcr1; 42 u64 mmcra; 44 u64 pmc1; 45 u64 pmc2; 46 u64 pmc3; 47 u64 pmc4; 48 u64 pmc5; 49 u64 pmc6; 50 u64 pmc [all...] |
H A D | user_exports.h | 18 typedef unsigned long u64; typedef 20 typedef unsigned long long u64; typedef 29 u64 undefined[16]; 41 u64 physicalMemorySize; /* Size of real memory(B) 0x10 */ 58 u64 tb_orig_stamp; /* Timebase at boot 0x30 */ 59 u64 tb_ticks_per_sec; /* Timebase tics / sec 0x38 */ 60 u64 tb_to_xs; /* Inverse of TB to 2^20 0x40 */ 61 u64 stamp_xsec; /* 0x48 */ 62 volatile u64 tb_update_count; /* Timebase atomicity 0x50 */ 66 u64 resv [all...] |
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-ppc64/ |
H A D | naca.h | 23 u64 xRamDiskSize; /* In pages 0x10 */ 25 u64 debug_switch; /* Debug print control 0x20 */ 26 u64 banner; /* Ptr to banner string 0x28 */ 27 u64 log; /* Ptr to log buffer 0x30 */ 28 u64 serialPortAddr; /* Phy addr of serial port 0x38 */ 29 u64 interrupt_controller; /* Type of int controller 0x40 */ 30 u64 slb_size; /* SLB size in entries 0x48 */ 31 u64 pftSize; /* Log 2 of page table size 0x50 */ 32 u64 resv0[5]; /* Reserved 0x58 - 0x7F */ 44 u64 physicalMemorySiz [all...] |
H A D | pci_dma.h | 43 u64 wholeTce; 45 u64 cacheBits :6; /* Cache hash bits - not used */ 46 u64 rsvd :6; 47 u64 rpn :40; /* Absolute page number */ 48 u64 valid :1; /* Tce is valid (vb only) */ 49 u64 allIo :1; /* Tce is valid for all lps (vb only) */ 50 u64 lpIndex :8; /* LpIndex for user of TCE (vb only) */ 51 u64 pciWrite :1; /* Write allowed (pci only) */ 52 u64 readWrite :1; /* Read allowed (pci), Write allowed (vb) */ 68 u64 busNumbe [all...] |
H A D | pmc.h | 40 u64 mmcr0; 41 u64 mmcr1; 42 u64 mmcra; 44 u64 pmc1; 45 u64 pmc2; 46 u64 pmc3; 47 u64 pmc4; 48 u64 pmc5; 49 u64 pmc6; 50 u64 pmc [all...] |
H A D | user_exports.h | 18 typedef unsigned long u64; typedef 20 typedef unsigned long long u64; typedef 29 u64 undefined[16]; 41 u64 physicalMemorySize; /* Size of real memory(B) 0x10 */ 58 u64 tb_orig_stamp; /* Timebase at boot 0x30 */ 59 u64 tb_ticks_per_sec; /* Timebase tics / sec 0x38 */ 60 u64 tb_to_xs; /* Inverse of TB to 2^20 0x40 */ 61 u64 stamp_xsec; /* 0x48 */ 62 volatile u64 tb_update_count; /* Timebase atomicity 0x50 */ 66 u64 resv [all...] |
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/ |
H A D | meth.h | 43 u64 sent:1; /* always set to 1...*/ 44 u64 pad0:34;/* always set to 0 */ 45 u64 flags:9; /*I'm too lazy to specify each one separately at the moment*/ 46 u64 col_retry_cnt:4; /*collision retry count*/ 47 u64 len:16; /*Transmit length in bytes*/ 56 u64 pad1:36; /*should be filled with 0 */ 57 u64 cat_ptr3_valid:1, /*Concatination pointer valid flags*/ 60 u64 tx_int_flag:1; /*Generate TX intrrupt when packet has been sent*/ 61 u64 term_dma_flag:1; /*Terminate transmit DMA on transmit abort conditions*/ 62 u64 data_offse [all...] |
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-ia64/ |
H A D | mca.h | 34 typedef u64 millisec_t; 37 u64 cmcv_regval; 39 u64 cmcr_vector : 8; 40 u64 cmcr_reserved1 : 4; 41 u64 cmcr_ignored1 : 1; 42 u64 cmcr_reserved2 : 3; 43 u64 cmcr_mask : 1; 44 u64 cmcr_ignored2 : 47; 63 u64 imi_mca_handler; 65 u64 imi_monarch_init_handle [all...] |
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-ia64/ |
H A D | mca.h | 34 typedef u64 millisec_t; 37 u64 cmcv_regval; 39 u64 cmcr_vector : 8; 40 u64 cmcr_reserved1 : 4; 41 u64 cmcr_ignored1 : 1; 42 u64 cmcr_reserved2 : 3; 43 u64 cmcr_mask : 1; 44 u64 cmcr_ignored2 : 47; 63 u64 imi_mca_handler; 65 u64 imi_monarch_init_handle [all...] |
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-sparc64/ |
H A D | timer.h | 29 u64 count0; 30 u64 limit0; 31 u64 count1; 32 u64 limit1;
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/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-sparc64/ |
H A D | timer.h | 29 u64 count0; 30 u64 limit0; 31 u64 count1; 32 u64 limit1;
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