1#ifndef _NACA_H 2#define _NACA_H 3 4/* 5 * c 2001 PPC 64 Team, IBM Corp 6 * 7 * This program is free software; you can redistribute it and/or 8 * modify it under the terms of the GNU General Public License 9 * as published by the Free Software Foundation; either version 10 * 2 of the License, or (at your option) any later version. 11 */ 12 13#include <asm/types.h> 14 15struct naca_struct { 16 /*================================================================== 17 * Cache line 1: 0x0000 - 0x007F 18 * Kernel only data - undefined for user space 19 *================================================================== 20 */ 21 void *xItVpdAreas; /* VPD Data 0x00 */ 22 void *xRamDisk; /* iSeries ramdisk 0x08 */ 23 u64 xRamDiskSize; /* In pages 0x10 */ 24 struct paca_struct *paca; /* Ptr to an array of pacas 0x18 */ 25 u64 debug_switch; /* Debug print control 0x20 */ 26 u64 banner; /* Ptr to banner string 0x28 */ 27 u64 log; /* Ptr to log buffer 0x30 */ 28 u64 serialPortAddr; /* Phy addr of serial port 0x38 */ 29 u64 interrupt_controller; /* Type of int controller 0x40 */ 30 u64 slb_size; /* SLB size in entries 0x48 */ 31 u64 pftSize; /* Log 2 of page table size 0x50 */ 32 u64 resv0[5]; /* Reserved 0x58 - 0x7F */ 33 34 /*================================================================== 35 * Cache line 2: 0x0080 - 0x00FF 36 * Kernel / User data 37 *================================================================== 38 */ 39 u8 eye_catcher[6]; /* Eyecatcher: PPC64 0x00 */ 40 u16 version; /* Version number 0x06 */ 41 u16 platform; /* Platform flags 0x08 */ 42 u16 processor; /* Processor type 0x0A */ 43 u32 processorCount; /* # of physical processors 0x0C */ 44 u64 physicalMemorySize; /* Size of real memory(B) 0x10 */ 45 46 u16 dCacheL1Size; /* L1 d-cache size 0x18 */ 47 u16 dCacheL1LineSize; /* L1 d-cache line size 0x1A */ 48 u16 dCacheL1LogLineSize; /* L1 d-cache line size Log2 0x1C */ 49 u16 dCacheL1LinesPerPage; /* L1 d-cache lines / page 0x1E */ 50 u16 dCacheL1Assoc; /* L1 d-cache associativity 0x20 */ 51 52 u16 iCacheL1Size; /* L1 i-cache size 0x22 */ 53 u16 iCacheL1LineSize; /* L1 i-cache line size 0x24 */ 54 u16 iCacheL1LogLineSize; /* L1 i-cache line size Log2 0x26 */ 55 u16 iCacheL1LinesPerPage; /* L1 i-cache lines / page 0x28 */ 56 u16 iCacheL1Assoc; /* L1 i-cache associativity 0x2A */ 57 58 u16 cacheL2Size; /* L2 cache size 0x2C */ 59 u16 cacheL2Assoc; /* L2 cache associativity 0x2E */ 60 61 u64 tb_orig_stamp; /* Timebase at boot 0x30 */ 62 u64 tb_ticks_per_sec; /* Timebase tics / sec 0x38 */ 63 u64 tb_to_xs; /* Inverse of TB to 2^20 0x40 */ 64 u64 stamp_xsec; /* 0x48 */ 65 volatile u64 tb_update_count; /* Timebase atomicity ctr 0x50 */ 66 u32 tz_minuteswest; /* Minutes west of Greenwich 0x58 */ 67 u32 tz_dsttime; /* Type of dst correction 0x5C */ 68 69 u64 resv1[4]; /* Reserverd 0x60 - 0x7F */ 70}; 71 72 73extern struct naca_struct *naca; 74 75#endif /* _NACA_H */ 76