/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/m68k/fpsp040/ |
H A D | skeleton.S | 90 | bug, if an E1 snan, ovfl, or unfl occurred, and the process was 92 | return was inex, rather than the correct exception. The snan, ovfl, 94 | fix is to check for E1, and the existence of one of snan, ovfl, 118 btstb #ovfl_bit,2(%sp) |test for ovfl 123 bra ovfl 176 .global ovfl 177 ovfl: label
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H A D | gen_except.S | 18 | ovfl 25 | reported if ovfl occurs and the ovfl enable bit is not 211 | the case of the ovfl exc without the ovfl enabled, but with 215 btstb #inex2_bit,FPCR_ENABLE(%a6) |check for ovfl/inex2 case 217 btstb #ovfl_bit,FPSR_EXCEPT(%a6) |now check ovfl 361 bfextu USER_FPSR(%a6){#17:#4},%d0 |get snan/operr/ovfl/unfl bits
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H A D | scale.S | 104 bges ovfl 113 ovfl: label
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H A D | res_func.S | 963 | The result has overflowed to $7fff exponent. Set I, ovfl, 1144 | The result has overflowed to $7fff exponent. Set I, ovfl, 1460 | that gen_except will have a correctly signed value for ovfl/unfl 1478 | that gen_except will have a correctly signed value for ovfl/unfl 1655 | ;set operr/aiop (no inex2 on int ovfl)
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H A D | bugfix.S | 171 | nu-generated ovfl, unfl, or inex exception. If the version
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/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/parisc/math-emu/ |
H A D | fcnvff.c | 259 Sgl_setwrapped_exponent(result,dest_exponent,ovfl);
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H A D | dfadd.c | 502 Dbl_setwrapped_exponent(resultp1,result_exponent,ovfl);
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H A D | dfdiv.c | 297 Dbl_setwrapped_exponent(resultp1,dest_exponent,ovfl);
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H A D | dfmpy.c | 292 Dbl_setwrapped_exponent(resultp1,dest_exponent,ovfl);
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H A D | dfsub.c | 505 Dbl_setwrapped_exponent(resultp1,result_exponent,ovfl);
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H A D | sfadd.c | 497 Sgl_setwrapped_exponent(result,result_exponent,ovfl);
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H A D | sfdiv.c | 291 Sgl_setwrapped_exponent(result,dest_exponent,ovfl);
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H A D | sfmpy.c | 278 Sgl_setwrapped_exponent(result,dest_exponent,ovfl);
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H A D | sfsub.c | 500 Sgl_setwrapped_exponent(result,result_exponent,ovfl);
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H A D | fmpyfadd.c | 677 Dbl_setwrapped_exponent(resultp1,result_exponent,ovfl); 1337 Dbl_setwrapped_exponent(resultp1,result_exponent,ovfl); 1978 Sgl_setwrapped_exponent(resultp1,result_exponent,ovfl); 2620 Sgl_setwrapped_exponent(resultp1,result_exponent,ovfl);
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H A D | sgl_float.h | 193 #define ovfl - macro
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H A D | dbl_float.h | 316 #define ovfl - macro
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/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/m68k/ifpsp060/src/ |
H A D | ftest.S | 117 ### ovfl non-maskable 191 ### ovfl
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H A D | pfpsp.S | 538 set OVFL_VEC, 0xd4 # ovfl vector offset 1673 # for snan,operr,ovfl,unfl, src op is still in FP_SRC so just 7451 ori.w &ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex 7454 ori.w &ovfinx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex/inex2 7672 ori.w &ovfl_inx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex 7675 ori.w &ovfinx_mask,2+USER_FPSR(%a6) # set ovfl/aovfl/ainex/inex2 8037 cmp.l %d0,(tbl_fmul_ovfl.w,%pc,%d1.w*4) # would result ovfl? 8108 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex 8685 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex 8928 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovf [all...] |
H A D | fpsp.S | 539 set OVFL_VEC, 0xd4 # ovfl vector offset 1674 # for snan,operr,ovfl,unfl, src op is still in FP_SRC so just 10320 bsr.l ovf_res # calc default ovfl result 10333 bsr.l ovf_res # calc default ovfl result 11606 cmp.l %d0,(tbl_fmul_ovfl.w,%pc,%d1.w*4) # would result ovfl? 11677 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex 12254 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex 12497 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex 13034 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovfl/ainex 13649 or.l &ovfl_inx_mask,USER_FPSR(%a6) # set ovfl/aovf [all...] |
H A D | fplsp.S | 519 set OVFL_VEC, 0xd4 # ovfl vector offset
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