Searched refs:mfctl (Results 1 - 24 of 24) sorted by relevance
| /asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-parisc/ |
| H A D | elf.h | 83 dst[48] = mfctl(22); dst[49] = mfctl(0); \
84 dst[50] = mfctl(24); dst[51] = mfctl(25); \
85 dst[52] = mfctl(26); dst[53] = mfctl(27); \
86 dst[54] = mfctl(28); dst[55] = mfctl(29); \
87 dst[56] = mfctl(30); dst[57] = mfctl(3
[all...] |
| H A D | delay.h | 4 #include <asm/system.h> /* for mfctl() */
32 start = mfctl(16);
33 while ((mfctl(16) - start) < clocks)
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| H A D | timex.h | 18 return mfctl(16);
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| H A D | system.h | 91 #define mfctl(reg) ({ \ macro
94 "mfctl " #reg ",%0" : \
107 #define get_eiem() mfctl(15)
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| H A D | assembly.h | 126 #define SAVE_CR(r, where) mfctl r, %r1 ! STREG %r1, where
270 mfctl %cr27, %r3
314 mfctl %cr27, %r3
376 * For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only
377 * reads 5 bits. Use mfctl,w to read all six bits. Otherwise
380 mfctl,w %cr11, %r1
391 mfctl %cr22, %r8
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-parisc/ |
| H A D | elf.h | 83 dst[48] = mfctl(22); dst[49] = mfctl(0); \
84 dst[50] = mfctl(24); dst[51] = mfctl(25); \
85 dst[52] = mfctl(26); dst[53] = mfctl(27); \
86 dst[54] = mfctl(28); dst[55] = mfctl(29); \
87 dst[56] = mfctl(30); dst[57] = mfctl(3
[all...] |
| H A D | delay.h | 4 #include <asm/system.h> /* for mfctl() */
32 start = mfctl(16);
33 while ((mfctl(16) - start) < clocks)
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| H A D | timex.h | 18 return mfctl(16);
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| H A D | system.h | 91 #define mfctl(reg) ({ \ macro
94 "mfctl " #reg ",%0" : \
107 #define get_eiem() mfctl(15)
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| H A D | assembly.h | 126 #define SAVE_CR(r, where) mfctl r, %r1 ! STREG %r1, where
270 mfctl %cr27, %r3
314 mfctl %cr27, %r3
376 * For PA2.0 mtsar or mtctl always write 6 bits, but mfctl only
377 * reads 5 bits. Use mfctl,w to read all six bits. Otherwise
380 mfctl,w %cr11, %r1
391 mfctl %cr22, %r8
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/arch/parisc/kernel/ |
| H A D | binfmt_elf32.c | 75 dst[48] = (elf_greg_t) mfctl(22); dst[49] = (elf_greg_t) mfctl(0); \
76 dst[50] = (elf_greg_t) mfctl(24); dst[51] = (elf_greg_t) mfctl(25); \
77 dst[52] = (elf_greg_t) mfctl(26); dst[53] = (elf_greg_t) mfctl(27); \
78 dst[54] = (elf_greg_t) mfctl(28); dst[55] = (elf_greg_t) mfctl(29); \
79 dst[56] = (elf_greg_t) mfctl(30); dst[57] = (elf_greg_t) mfctl(3
[all...] |
| H A D | entry.S | 147 mfctl %cr30, %r1
224 mfctl %pcsq, spc
226 mfctl %pcoq, va
237 mfctl %pcsq, spc
243 mfctl %pcoq, va
261 mfctl %isr,spc
263 mfctl %ior,va
281 mfctl %isr,spc
287 mfctl %ior,va
299 mfctl
[all...] |
| H A D | time.c | 67 long now = mfctl(16);
76 /* since time passes between the interrupt and the mfctl()
144 elapsed_cycles = mfctl(16) - last_tick;
216 next_tick = mfctl(16);
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| H A D | traps.c | 111 cr30 = mfctl(30);
112 cr31 = mfctl(31);
158 cr30 = mfctl(30);
159 cr31 = mfctl(31);
539 regs->gr[regs->iir & 0x1f] = mfctl(27);
541 regs->gr[regs->iir & 0x1f] = mfctl(26);
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| H A D | irq.c | 382 unsigned long cr_start = mfctl(16);
403 unsigned long cr_end = mfctl(16);
440 while ((eirr_val = (mfctl(23) & cpu_eiem)) && --i) {
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| H A D | head.S | 194 mfctl,w %cr11,%r10
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| H A D | hpmc.S | 115 mfctl %cr14, %r4
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| H A D | real2.S | 107 # define PUSH_CR(r, where) mfctl r, %r1 ! STREG,ma %r1, REG_SZ(where)
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| H A D | syscall.S | 89 mfctl %cr30,%r1
129 mfctl %cr11, %r27 /* i.e. SAR */
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| H A D | ccio-dma.c | 253 unsigned long cr_start = mfctl(16);
295 unsigned long cr_end = mfctl(16);
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| H A D | perf_asm.S | 39 mfctl ccr,%r26 ; get coprocessor register
65 mfctl ccr,%r26 ; get coprocessor register
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| H A D | sba_iommu.c | 544 unsigned long cr_start = mfctl(16);
579 unsigned long cr_end = mfctl(16);
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/arch/parisc/hpux/ |
| H A D | gate.S | 50 mfctl %cr30,%r1
90 mfctl %cr11, %r27 /* i.e. SAR */
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/arch/parisc/lib/ |
| H A D | lusercopy.S | 45 mfctl %cr30,%r1
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