Searched refs:SDLC (Results 1 - 9 of 9) sorted by relevance
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/hamradio/ |
H A D | z8530.h | 57 #define ADD_SM 0x4 /* Address Search Mode (SDLC) */ 78 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */ macro 90 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */ 99 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */ 101 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */ 118 #define LOOPMODE 2 /* SDLC Loop mode */ 119 #define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */ 196 #define END_FR 0x80 /* End of Frame (SDLC) */ 224 /* Write Register 7' (SDLC/HDL [all...] |
H A D | dmascc.c | 495 /* Determine type of chip by enabling SDLC/HDLC enhancements */ 746 /* X1 clock, SDLC mode */ 747 write_scc(priv, R4, SDLC | X1CLK); 754 /* SDLC address field */ 756 /* SDLC flag */
|
H A D | scc.c | 797 wr(scc,R4,X1CLK|SDLC); /* *1 clock, SDLC mode */ 801 wr(scc,R6,0); /* SDLC address zero (not used) */ 802 wr(scc,R7,FLAG); /* SDLC flag value */ 857 or(scc,R15,SHDLCE|FIFOE); /* enable FIFO, SDLC/HDLC Enhancements (From now R7 is R7') */
|
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/macintosh/ |
H A D | macserial.h | 272 #define ADD_SM 0x4 /* Address Search Mode (SDLC) */ 295 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */ macro 308 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */ 318 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */ 320 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */ 340 #define LOOPMODE 2 /* SDLC Loop mode */ 341 #define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */ 387 #define ENSTFIFO 4 /* Enable status FIFO (SDLC) */ 420 #define END_FR 0x80 /* End of Frame (SDLC) */ [all...] |
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/sbus/char/ |
H A D | zs.h | 237 #define ADD_SM 0x4 /* Address Search Mode (SDLC) */ 259 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */ macro 271 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */ 281 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */ 283 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */ 300 #define LOOPMODE 2 /* SDLC Loop mode */ 301 #define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */ 378 #define END_FR 0x80 /* End of Frame (SDLC) */
|
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/sgi/char/ |
H A D | sgiserial.h | 243 #define ADD_SM 0x4 /* Address Search Mode (SDLC) */ 264 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */ macro 276 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */ 285 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */ 287 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */ 304 #define LOOPMODE 2 /* SDLC Loop mode */ 305 #define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */ 382 #define END_FR 0x80 /* End of Frame (SDLC) */
|
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/tc/ |
H A D | zs.h | 239 #define ADD_SM 0x4 /* Address Search Mode (SDLC) */ 262 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */ macro 275 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */ 285 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */ 287 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */ 305 #define LOOPMODE 2 /* SDLC Loop mode */ 306 #define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */ 383 #define END_FR 0x80 /* End of Frame (SDLC) */
|
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/wan/ |
H A D | z85230.h | 77 #define ADD_SM 0x4 /* Address Search Mode (SDLC) */ 98 #define SDLC 0x20 /* SDLC Mode (01111110 Sync Flag) */ macro 110 #define SDLC_CRC 0x4 /* SDLC/CRC-16 */ 119 /* Write Register 6 (Sync bits 0-7/SDLC Address Field) */ 121 /* Write Register 7 (Sync bits 8-15/SDLC 01111110) */ 138 #define LOOPMODE 2 /* SDLC Loop mode */ 139 #define ABUNDER 4 /* Abort/flag on SDLC xmit underrun */ 218 #define END_FR 0x80 /* End of Frame (SDLC) */
|
H A D | z85230.c | 208 4, SYNC_ENAB|SDLC|X1CLK, 233 4, SYNC_ENAB|SDLC|X1CLK,
|
Completed in 70 milliseconds