Searched refs:LE_CSR0 (Results 1 - 6 of 6) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/
H A D7990.c98 WRITERAP(LE_CSR0);
201 WRITERAP(LE_CSR0);
228 WRITERAP(LE_CSR0);
356 WRITERAP(LE_CSR0);
373 WRITERAP(LE_CSR0);
413 WRITERAP(LE_CSR0); /* LANCE Controller Status */
454 WRITERAP(LE_CSR0);
485 WRITERAP(LE_CSR0);
616 WRITERAP(LE_CSR0);
H A Da2065.h50 #define LE_CSR0 0x0000 /* LANCE Controller Status */ macro
H A Da2065.c169 ll->rap = LE_CSR0;
258 ll->rap = LE_CSR0;
388 ll->rap = LE_CSR0;
405 ll->rap = LE_CSR0;
448 ll->rap = LE_CSR0; /* LANCE Controller Status */
483 ll->rap = LE_CSR0;
500 ll->rap = LE_CSR0;
525 ll->rap = LE_CSR0;
539 ll->rap = LE_CSR0;
689 ll->rap = LE_CSR0;
[all...]
H A Ddeclance.c87 #define LE_CSR0 0 macro
315 writereg(&ll->rap, LE_CSR0);
506 writereg(&ll->rap, LE_CSR0);
647 writereg(&ll->rap, LE_CSR0);
663 writereg(&ll->rap, LE_CSR0);
712 writereg(&ll->rap, LE_CSR0);
762 writereg(&ll->rap, LE_CSR0);
826 writereg(&ll->rap, LE_CSR0);
857 writereg(&ll->rap, LE_CSR0);
988 writereg(&ll->rap, LE_CSR0);
[all...]
H A D7990.h138 #define LE_CSR0 0x0000 /* LANCE Controller Status */ macro
H A Dsunlance.c122 #define LE_CSR0 0 macro
279 sbus_writew(LE_CSR0, __base + RAP); \
315 sbus_writew(LE_CSR0, lp->lregs + RAP);
473 sbus_writew(LE_CSR0, lp->lregs + RAP);
827 sbus_writew(LE_CSR0, lp->lregs + RAP);

Completed in 96 milliseconds