1/*
2 *    Lance ethernet driver for the MIPS processor based
3 *      DECstation family
4 *
5 *
6 *      adopted from sunlance.c by Richard van den Berg
7 *
8 *      Copyright (C) 2002  Maciej W. Rozycki
9 *
10 *      additional sources:
11 *      - PMAD-AA TURBOchannel Ethernet Module Functional Specification,
12 *        Revision 1.2
13 *
14 *      History:
15 *
16 *      v0.001: The kernel accepts the code and it shows the hardware address.
17 *
18 *      v0.002: Removed most sparc stuff, left only some module and dma stuff.
19 *
20 *      v0.003: Enhanced base address calculation from proposals by
21 *              Harald Koerfgen and Thomas Riemer.
22 *
23 *      v0.004: lance-regs is pointing at the right addresses, added prom
24 *              check. First start of address mapping and DMA.
25 *
26 *      v0.005: started to play around with LANCE-DMA. This driver will not
27 *              work for non IOASIC lances. HK
28 *
29 *      v0.006: added pointer arrays to lance_private and setup routine for
30 *              them in dec_lance_init. HK
31 *
32 *      v0.007: Big shit. The LANCE seems to use a different DMA mechanism to
33 *              access the init block. This looks like one (short) word at a
34 *              time, but the smallest amount the IOASIC can transfer is a
35 *              (long) word. So we have a 2-2 padding here. Changed
36 *              lance_init_block accordingly. The 16-16 padding for the buffers
37 *              seems to be correct. HK
38 *
39 *      v0.008: mods to make PMAX_LANCE work. 01/09/1999 triemer
40 *
41 *      v0.009: Module support fixes, multiple interfaces support, various
42 *              bits. macro
43 */
44
45#include <linux/config.h>
46#include <linux/crc32.h>
47#include <linux/delay.h>
48#include <linux/errno.h>
49#include <linux/if_ether.h>
50#include <linux/init.h>
51#include <linux/kernel.h>
52#include <linux/module.h>
53#include <linux/netdevice.h>
54#include <linux/etherdevice.h>
55#include <linux/spinlock.h>
56#include <linux/stddef.h>
57#include <linux/string.h>
58
59#include <asm/addrspace.h>
60#include <asm/dec/interrupts.h>
61#include <asm/dec/ioasic.h>
62#include <asm/dec/ioasic_addrs.h>
63#include <asm/dec/kn01.h>
64#include <asm/dec/machtype.h>
65#include <asm/dec/tc.h>
66#include <asm/system.h>
67
68static char version[] __devinitdata =
69"declance.c: v0.009 by Linux MIPS DECstation task force\n";
70
71MODULE_AUTHOR("Linux MIPS DECstation task force");
72MODULE_DESCRIPTION("DEC LANCE (DECstation onboard, PMAD-xx) driver");
73MODULE_LICENSE("GPL");
74
75/*
76 * card types
77 */
78#define ASIC_LANCE 1
79#define PMAD_LANCE 2
80#define PMAX_LANCE 3
81
82#ifndef CONFIG_TC
83unsigned long system_base;
84unsigned long dmaptr;
85#endif
86
87#define LE_CSR0 0
88#define LE_CSR1 1
89#define LE_CSR2 2
90#define LE_CSR3 3
91
92#define LE_MO_PROM      0x8000	/* Enable promiscuous mode */
93
94#define	LE_C0_ERR	0x8000	/* Error: set if BAB, SQE, MISS or ME is set */
95#define	LE_C0_BABL	0x4000	/* BAB:  Babble: tx timeout. */
96#define	LE_C0_CERR	0x2000	/* SQE:  Signal quality error */
97#define	LE_C0_MISS	0x1000	/* MISS: Missed a packet */
98#define	LE_C0_MERR	0x0800	/* ME:   Memory error */
99#define	LE_C0_RINT	0x0400	/* Received interrupt */
100#define	LE_C0_TINT	0x0200	/* Transmitter Interrupt */
101#define	LE_C0_IDON	0x0100	/* IFIN: Init finished. */
102#define	LE_C0_INTR	0x0080	/* Interrupt or error */
103#define	LE_C0_INEA	0x0040	/* Interrupt enable */
104#define	LE_C0_RXON	0x0020	/* Receiver on */
105#define	LE_C0_TXON	0x0010	/* Transmitter on */
106#define	LE_C0_TDMD	0x0008	/* Transmitter demand */
107#define	LE_C0_STOP	0x0004	/* Stop the card */
108#define	LE_C0_STRT	0x0002	/* Start the card */
109#define	LE_C0_INIT	0x0001	/* Init the card */
110
111#define	LE_C3_BSWP	0x4	/* SWAP */
112#define	LE_C3_ACON	0x2	/* ALE Control */
113#define	LE_C3_BCON	0x1	/* Byte control */
114
115/* Receive message descriptor 1 */
116#define LE_R1_OWN       0x80	/* Who owns the entry */
117#define LE_R1_ERR       0x40	/* Error: if FRA, OFL, CRC or BUF is set */
118#define LE_R1_FRA       0x20	/* FRA: Frame error */
119#define LE_R1_OFL       0x10	/* OFL: Frame overflow */
120#define LE_R1_CRC       0x08	/* CRC error */
121#define LE_R1_BUF       0x04	/* BUF: Buffer error */
122#define LE_R1_SOP       0x02	/* Start of packet */
123#define LE_R1_EOP       0x01	/* End of packet */
124#define LE_R1_POK       0x03	/* Packet is complete: SOP + EOP */
125
126#define LE_T1_OWN       0x80	/* Lance owns the packet */
127#define LE_T1_ERR       0x40	/* Error summary */
128#define LE_T1_EMORE     0x10	/* Error: more than one retry needed */
129#define LE_T1_EONE      0x08	/* Error: one retry needed */
130#define LE_T1_EDEF      0x04	/* Error: deferred */
131#define LE_T1_SOP       0x02	/* Start of packet */
132#define LE_T1_EOP       0x01	/* End of packet */
133#define LE_T1_POK	0x03	/* Packet is complete: SOP + EOP */
134
135#define LE_T3_BUF       0x8000	/* Buffer error */
136#define LE_T3_UFL       0x4000	/* Error underflow */
137#define LE_T3_LCOL      0x1000	/* Error late collision */
138#define LE_T3_CLOS      0x0800	/* Error carrier loss */
139#define LE_T3_RTY       0x0400	/* Error retry */
140#define LE_T3_TDR       0x03ff	/* Time Domain Reflectometry counter */
141
142/* Define: 2^4 Tx buffers and 2^4 Rx buffers */
143
144#ifndef LANCE_LOG_TX_BUFFERS
145#define LANCE_LOG_TX_BUFFERS 4
146#define LANCE_LOG_RX_BUFFERS 4
147#endif
148
149#define TX_RING_SIZE			(1 << (LANCE_LOG_TX_BUFFERS))
150#define TX_RING_MOD_MASK		(TX_RING_SIZE - 1)
151
152#define RX_RING_SIZE			(1 << (LANCE_LOG_RX_BUFFERS))
153#define RX_RING_MOD_MASK		(RX_RING_SIZE - 1)
154
155#define PKT_BUF_SZ		1536
156#define RX_BUFF_SIZE            PKT_BUF_SZ
157#define TX_BUFF_SIZE            PKT_BUF_SZ
158
159#undef TEST_HITS
160#define ZERO 0
161
162/* The DS2000/3000 have a linear 64 KB buffer.
163
164 * The PMAD-AA has 128 kb buffer on-board.
165 *
166 * The IOASIC LANCE devices use a shared memory region. This region as seen
167 * from the CPU is (max) 128 KB long and has to be on an 128 KB boundary.
168 * The LANCE sees this as a 64 KB long continuous memory region.
169 *
170 * The LANCE's DMA address is used as an index in this buffer and DMA takes
171 * place in bursts of eight 16-Bit words which are packed into four 32-Bit words
172 * by the IOASIC. This leads to a strange padding: 16 bytes of valid data followed
173 * by a 16 byte gap :-(.
174 */
175
176struct lance_rx_desc {
177	unsigned short rmd0;		/* low address of packet */
178	short gap0;
179	unsigned char rmd1_hadr;	/* high address of packet */
180	unsigned char rmd1_bits;	/* descriptor bits */
181	short gap1;
182	short length;			/* 2s complement (negative!)
183					   of buffer length */
184	short gap2;
185	unsigned short mblength;	/* actual number of bytes received */
186	short gap3;
187};
188
189struct lance_tx_desc {
190	unsigned short tmd0;		/* low address of packet */
191	short gap0;
192	unsigned char tmd1_hadr;	/* high address of packet */
193	unsigned char tmd1_bits;	/* descriptor bits */
194	short gap1;
195	short length;			/* 2s complement (negative!)
196					   of buffer length */
197	short gap2;
198	unsigned short misc;
199	short gap3;
200};
201
202
203/* First part of the LANCE initialization block, described in databook. */
204struct lance_init_block {
205	unsigned short mode;		/* pre-set mode (reg. 15) */
206	short gap0;
207
208	unsigned char phys_addr[12];	/* physical ethernet address
209					   only 0, 1, 4, 5, 8, 9 are valid
210					   2, 3, 6, 7, 10, 11 are gaps */
211	unsigned short filter[8];	/* multicast filter
212					   only 0, 2, 4, 6 are valid
213					   1, 3, 5, 7 are gaps */
214
215	/* Receive and transmit ring base, along with extra bits. */
216	unsigned short rx_ptr;		/* receive descriptor addr */
217	short gap1;
218	unsigned short rx_len;		/* receive len and high addr */
219	short gap2;
220	unsigned short tx_ptr;		/* transmit descriptor addr */
221	short gap3;
222	unsigned short tx_len;		/* transmit len and high addr */
223	short gap4;
224	short gap5[8];
225
226	/* The buffer descriptors */
227	struct lance_rx_desc brx_ring[RX_RING_SIZE];
228	struct lance_tx_desc btx_ring[TX_RING_SIZE];
229};
230
231#define BUF_OFFSET_CPU sizeof(struct lance_init_block)
232#define BUF_OFFSET_LNC (sizeof(struct lance_init_block)>>1)
233
234#define libdesc_offset(rt, elem) \
235((__u32)(((unsigned long)(&(((struct lance_init_block *)0)->rt[elem])))))
236
237/*
238 * This works *only* for the ring descriptors
239 */
240#define LANCE_ADDR(x) (PHYSADDR(x) >> 1)
241
242struct lance_private {
243	struct net_device *next;
244	int type;
245	int slot;
246	int dma_irq;
247	volatile struct lance_regs *ll;
248	volatile struct lance_init_block *init_block;
249
250	spinlock_t	lock;
251
252	int rx_new, tx_new;
253	int rx_old, tx_old;
254
255	struct net_device_stats stats;
256
257	unsigned short busmaster_regval;
258
259	struct timer_list       multicast_timer;
260
261	/* Pointers to the ring buffers as seen from the CPU */
262	char *rx_buf_ptr_cpu[RX_RING_SIZE];
263	char *tx_buf_ptr_cpu[TX_RING_SIZE];
264
265	/* Pointers to the ring buffers as seen from the LANCE */
266	char *rx_buf_ptr_lnc[RX_RING_SIZE];
267	char *tx_buf_ptr_lnc[TX_RING_SIZE];
268};
269
270#define TX_BUFFS_AVAIL ((lp->tx_old<=lp->tx_new)?\
271			lp->tx_old+TX_RING_MOD_MASK-lp->tx_new:\
272			lp->tx_old - lp->tx_new-1)
273
274/* The lance control ports are at an absolute address, machine and tc-slot
275 * dependant.
276 * DECstations do only 32-bit access and the LANCE uses 16 bit addresses,
277 * so we have to give the structure an extra member making rap pointing
278 * at the right address
279 */
280struct lance_regs {
281	volatile unsigned short rdp;	/* register data port */
282	unsigned short pad;
283	volatile unsigned short rap;	/* register address port */
284};
285
286int dec_lance_debug = 2;
287
288static struct net_device *root_lance_dev;
289
290static inline void writereg(volatile unsigned short *regptr, short value)
291{
292	*regptr = value;
293	iob();
294}
295
296/* Load the CSR registers */
297static void load_csrs(struct lance_private *lp)
298{
299	volatile struct lance_regs *ll = lp->ll;
300	int leptr;
301
302	/* The address space as seen from the LANCE
303	 * begins at address 0. HK
304	 */
305	leptr = 0;
306
307	writereg(&ll->rap, LE_CSR1);
308	writereg(&ll->rdp, (leptr & 0xFFFF));
309	writereg(&ll->rap, LE_CSR2);
310	writereg(&ll->rdp, leptr >> 16);
311	writereg(&ll->rap, LE_CSR3);
312	writereg(&ll->rdp, lp->busmaster_regval);
313
314	/* Point back to csr0 */
315	writereg(&ll->rap, LE_CSR0);
316}
317
318/*
319 * Our specialized copy routines
320 *
321 */
322void cp_to_buf(const int type, void *to, const void *from, int len)
323{
324	unsigned short *tp, *fp, clen;
325	unsigned char *rtp, *rfp;
326
327	if (type == PMAX_LANCE) {
328		clen = len >> 1;
329		tp = (unsigned short *) to;
330		fp = (unsigned short *) from;
331
332		while (clen--) {
333			*tp++ = *fp++;
334			tp++;
335		}
336
337		clen = len & 1;
338		rtp = (unsigned char *) tp;
339		rfp = (unsigned char *) fp;
340		while (clen--) {
341			*rtp++ = *rfp++;
342		}
343	} else {
344		/*
345		 * copy 16 Byte chunks
346		 */
347		clen = len >> 4;
348		tp = (unsigned short *) to;
349		fp = (unsigned short *) from;
350		while (clen--) {
351			*tp++ = *fp++;
352			*tp++ = *fp++;
353			*tp++ = *fp++;
354			*tp++ = *fp++;
355			*tp++ = *fp++;
356			*tp++ = *fp++;
357			*tp++ = *fp++;
358			*tp++ = *fp++;
359			tp += 8;
360		}
361
362		/*
363		 * do the rest, if any.
364		 */
365		clen = len & 15;
366		rtp = (unsigned char *) tp;
367		rfp = (unsigned char *) fp;
368		while (clen--) {
369			*rtp++ = *rfp++;
370		}
371	}
372
373	iob();
374}
375
376void cp_from_buf(const int type, void *to, const void *from, int len)
377{
378	unsigned short *tp, *fp, clen;
379	unsigned char *rtp, *rfp;
380
381	if (type == PMAX_LANCE) {
382		clen = len >> 1;
383		tp = (unsigned short *) to;
384		fp = (unsigned short *) from;
385		while (clen--) {
386			*tp++ = *fp++;
387			fp++;
388		}
389
390		clen = len & 1;
391
392		rtp = (unsigned char *) tp;
393		rfp = (unsigned char *) fp;
394
395		while (clen--) {
396			*rtp++ = *rfp++;
397		}
398	} else {
399
400		/*
401		 * copy 16 Byte chunks
402		 */
403		clen = len >> 4;
404		tp = (unsigned short *) to;
405		fp = (unsigned short *) from;
406		while (clen--) {
407			*tp++ = *fp++;
408			*tp++ = *fp++;
409			*tp++ = *fp++;
410			*tp++ = *fp++;
411			*tp++ = *fp++;
412			*tp++ = *fp++;
413			*tp++ = *fp++;
414			*tp++ = *fp++;
415			fp += 8;
416		}
417
418		/*
419		 * do the rest, if any.
420		 */
421		clen = len & 15;
422		rtp = (unsigned char *) tp;
423		rfp = (unsigned char *) fp;
424		while (clen--) {
425			*rtp++ = *rfp++;
426		}
427
428
429	}
430
431}
432
433/* Setup the Lance Rx and Tx rings */
434static void lance_init_ring(struct net_device *dev)
435{
436	struct lance_private *lp = (struct lance_private *) dev->priv;
437	volatile struct lance_init_block *ib;
438	int leptr;
439	int i;
440
441	ib = (struct lance_init_block *) (dev->mem_start);
442
443	/* Lock out other processes while setting up hardware */
444	netif_stop_queue(dev);
445	lp->rx_new = lp->tx_new = 0;
446	lp->rx_old = lp->tx_old = 0;
447
448	ib->phys_addr[0] = dev->dev_addr[0];
449	ib->phys_addr[1] = dev->dev_addr[1];
450	ib->phys_addr[4] = dev->dev_addr[2];
451	ib->phys_addr[5] = dev->dev_addr[3];
452	ib->phys_addr[8] = dev->dev_addr[4];
453	ib->phys_addr[9] = dev->dev_addr[5];
454	/* Setup the initialization block */
455
456	/* Setup rx descriptor pointer */
457	leptr = LANCE_ADDR(libdesc_offset(brx_ring, 0));
458	ib->rx_len = (LANCE_LOG_RX_BUFFERS << 13) | (leptr >> 16);
459	ib->rx_ptr = leptr;
460	if (ZERO)
461		printk("RX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(brx_ring, 0));
462
463	/* Setup tx descriptor pointer */
464	leptr = LANCE_ADDR(libdesc_offset(btx_ring, 0));
465	ib->tx_len = (LANCE_LOG_TX_BUFFERS << 13) | (leptr >> 16);
466	ib->tx_ptr = leptr;
467	if (ZERO)
468		printk("TX ptr: %8.8x(%8.8x)\n", leptr, libdesc_offset(btx_ring, 0));
469
470	if (ZERO)
471		printk("TX rings:\n");
472
473	/* Setup the Tx ring entries */
474	for (i = 0; i < TX_RING_SIZE; i++) {
475		leptr = (int) lp->tx_buf_ptr_lnc[i];
476		ib->btx_ring[i].tmd0 = leptr;
477		ib->btx_ring[i].tmd1_hadr = leptr >> 16;
478		ib->btx_ring[i].tmd1_bits = 0;
479		ib->btx_ring[i].length = 0xf000;	/* The ones required by tmd2 */
480		ib->btx_ring[i].misc = 0;
481		if (i < 3 && ZERO)
482			printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->tx_buf_ptr_cpu[i]);
483	}
484
485	/* Setup the Rx ring entries */
486	if (ZERO)
487		printk("RX rings:\n");
488	for (i = 0; i < RX_RING_SIZE; i++) {
489		leptr = (int) lp->rx_buf_ptr_lnc[i];
490		ib->brx_ring[i].rmd0 = leptr;
491		ib->brx_ring[i].rmd1_hadr = leptr >> 16;
492		ib->brx_ring[i].rmd1_bits = LE_R1_OWN;
493		ib->brx_ring[i].length = -RX_BUFF_SIZE | 0xf000;
494		ib->brx_ring[i].mblength = 0;
495		if (i < 3 && ZERO)
496			printk("%d: 0x%8.8x(0x%8.8x)\n", i, leptr, (int) lp->rx_buf_ptr_cpu[i]);
497	}
498	iob();
499}
500
501static int init_restart_lance(struct lance_private *lp)
502{
503	volatile struct lance_regs *ll = lp->ll;
504	int i;
505
506	writereg(&ll->rap, LE_CSR0);
507	writereg(&ll->rdp, LE_C0_INIT);
508
509	/* Wait for the lance to complete initialization */
510	for (i = 0; (i < 100) && !(ll->rdp & LE_C0_IDON); i++) {
511		udelay(10);
512	}
513	if ((i == 100) || (ll->rdp & LE_C0_ERR)) {
514		printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
515		return -1;
516	}
517	if ((ll->rdp & LE_C0_ERR)) {
518		printk("LANCE unopened after %d ticks, csr0=%4.4x.\n", i, ll->rdp);
519		return -1;
520	}
521	writereg(&ll->rdp, LE_C0_IDON);
522	writereg(&ll->rdp, LE_C0_STRT);
523	writereg(&ll->rdp, LE_C0_INEA);
524
525	return 0;
526}
527
528static int lance_rx(struct net_device *dev)
529{
530	struct lance_private *lp = (struct lance_private *) dev->priv;
531	volatile struct lance_init_block *ib;
532	volatile struct lance_rx_desc *rd = 0;
533	unsigned char bits;
534	int len = 0;
535	struct sk_buff *skb = 0;
536	ib = (struct lance_init_block *) (dev->mem_start);
537
538#ifdef TEST_HITS
539	{
540		int i;
541
542		printk("[");
543		for (i = 0; i < RX_RING_SIZE; i++) {
544			if (i == lp->rx_new)
545				printk("%s", ib->brx_ring[i].rmd1_bits &
546					     LE_R1_OWN ? "_" : "X");
547			else
548				printk("%s", ib->brx_ring[i].rmd1_bits &
549					     LE_R1_OWN ? "." : "1");
550		}
551		printk("]");
552	}
553#endif
554
555	for (rd = &ib->brx_ring[lp->rx_new];
556	     !((bits = rd->rmd1_bits) & LE_R1_OWN);
557	     rd = &ib->brx_ring[lp->rx_new]) {
558
559		/* We got an incomplete frame? */
560		if ((bits & LE_R1_POK) != LE_R1_POK) {
561			lp->stats.rx_over_errors++;
562			lp->stats.rx_errors++;
563		} else if (bits & LE_R1_ERR) {
564			/* Count only the end frame as a rx error,
565			 * not the beginning
566			 */
567			if (bits & LE_R1_BUF)
568				lp->stats.rx_fifo_errors++;
569			if (bits & LE_R1_CRC)
570				lp->stats.rx_crc_errors++;
571			if (bits & LE_R1_OFL)
572				lp->stats.rx_over_errors++;
573			if (bits & LE_R1_FRA)
574				lp->stats.rx_frame_errors++;
575			if (bits & LE_R1_EOP)
576				lp->stats.rx_errors++;
577		} else {
578			len = (rd->mblength & 0xfff) - 4;
579			skb = dev_alloc_skb(len + 2);
580
581			if (skb == 0) {
582				printk("%s: Memory squeeze, deferring packet.\n",
583				       dev->name);
584				lp->stats.rx_dropped++;
585				rd->mblength = 0;
586				rd->rmd1_bits = LE_R1_OWN;
587				lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
588				return 0;
589			}
590			lp->stats.rx_bytes += len;
591
592			skb->dev = dev;
593			skb_reserve(skb, 2);	/* 16 byte align */
594			skb_put(skb, len);	/* make room */
595
596			cp_from_buf(lp->type, skb->data,
597				    (char *)lp->rx_buf_ptr_cpu[lp->rx_new],
598				    len);
599
600			skb->protocol = eth_type_trans(skb, dev);
601			netif_rx(skb);
602			dev->last_rx = jiffies;
603			lp->stats.rx_packets++;
604		}
605
606		/* Return the packet to the pool */
607		rd->mblength = 0;
608		rd->length = -RX_BUFF_SIZE | 0xf000;
609		rd->rmd1_bits = LE_R1_OWN;
610		lp->rx_new = (lp->rx_new + 1) & RX_RING_MOD_MASK;
611	}
612	return 0;
613}
614
615static void lance_tx(struct net_device *dev)
616{
617	struct lance_private *lp = (struct lance_private *) dev->priv;
618	volatile struct lance_init_block *ib;
619	volatile struct lance_regs *ll = lp->ll;
620	volatile struct lance_tx_desc *td;
621	int i, j;
622	int status;
623	ib = (struct lance_init_block *) (dev->mem_start);
624	j = lp->tx_old;
625
626	spin_lock(&lp->lock);
627
628	for (i = j; i != lp->tx_new; i = j) {
629		td = &ib->btx_ring[i];
630		/* If we hit a packet not owned by us, stop */
631		if (td->tmd1_bits & LE_T1_OWN)
632			break;
633
634		if (td->tmd1_bits & LE_T1_ERR) {
635			status = td->misc;
636
637			lp->stats.tx_errors++;
638			if (status & LE_T3_RTY)
639				lp->stats.tx_aborted_errors++;
640			if (status & LE_T3_LCOL)
641				lp->stats.tx_window_errors++;
642
643			if (status & LE_T3_CLOS) {
644				lp->stats.tx_carrier_errors++;
645				printk("%s: Carrier Lost\n", dev->name);
646				/* Stop the lance */
647				writereg(&ll->rap, LE_CSR0);
648				writereg(&ll->rdp, LE_C0_STOP);
649				lance_init_ring(dev);
650				load_csrs(lp);
651				init_restart_lance(lp);
652				goto out;
653			}
654			/* Buffer errors and underflows turn off the
655			 * transmitter, restart the adapter.
656			 */
657			if (status & (LE_T3_BUF | LE_T3_UFL)) {
658				lp->stats.tx_fifo_errors++;
659
660				printk("%s: Tx: ERR_BUF|ERR_UFL, restarting\n",
661				       dev->name);
662				/* Stop the lance */
663				writereg(&ll->rap, LE_CSR0);
664				writereg(&ll->rdp, LE_C0_STOP);
665				lance_init_ring(dev);
666				load_csrs(lp);
667				init_restart_lance(lp);
668				goto out;
669			}
670		} else if ((td->tmd1_bits & LE_T1_POK) == LE_T1_POK) {
671			/*
672			 * So we don't count the packet more than once.
673			 */
674			td->tmd1_bits &= ~(LE_T1_POK);
675
676			/* One collision before packet was sent. */
677			if (td->tmd1_bits & LE_T1_EONE)
678				lp->stats.collisions++;
679
680			/* More than one collision, be optimistic. */
681			if (td->tmd1_bits & LE_T1_EMORE)
682				lp->stats.collisions += 2;
683
684			lp->stats.tx_packets++;
685		}
686		j = (j + 1) & TX_RING_MOD_MASK;
687	}
688	lp->tx_old = j;
689out:
690	if (netif_queue_stopped(dev) &&
691	    TX_BUFFS_AVAIL > 0)
692		netif_wake_queue(dev);
693
694	spin_unlock(&lp->lock);
695}
696
697static void lance_dma_merr_int(const int irq, void *dev_id,
698				struct pt_regs *regs)
699{
700	struct net_device *dev = (struct net_device *) dev_id;
701
702	printk("%s: DMA error\n", dev->name);
703}
704
705static void lance_interrupt(const int irq, void *dev_id, struct pt_regs *regs)
706{
707	struct net_device *dev = (struct net_device *) dev_id;
708	struct lance_private *lp = (struct lance_private *) dev->priv;
709	volatile struct lance_regs *ll = lp->ll;
710	int csr0;
711
712	writereg(&ll->rap, LE_CSR0);
713	csr0 = ll->rdp;
714
715	/* Acknowledge all the interrupt sources ASAP */
716	writereg(&ll->rdp, csr0 & (LE_C0_INTR | LE_C0_TINT | LE_C0_RINT));
717
718	if ((csr0 & LE_C0_ERR)) {
719		/* Clear the error condition */
720		writereg(&ll->rdp, LE_C0_BABL | LE_C0_ERR | LE_C0_MISS |
721			 LE_C0_CERR | LE_C0_MERR);
722	}
723	if (csr0 & LE_C0_RINT)
724		lance_rx(dev);
725
726	if (csr0 & LE_C0_TINT)
727		lance_tx(dev);
728
729	if (csr0 & LE_C0_BABL)
730		lp->stats.tx_errors++;
731
732	if (csr0 & LE_C0_MISS)
733		lp->stats.rx_errors++;
734
735	if (csr0 & LE_C0_MERR) {
736		printk("%s: Memory error, status %04x\n", dev->name, csr0);
737
738		writereg(&ll->rdp, LE_C0_STOP);
739
740		lance_init_ring(dev);
741		load_csrs(lp);
742		init_restart_lance(lp);
743		netif_wake_queue(dev);
744	}
745
746	writereg(&ll->rdp, LE_C0_INEA);
747	writereg(&ll->rdp, LE_C0_INEA);
748}
749
750struct net_device *last_dev = 0;
751
752static int lance_open(struct net_device *dev)
753{
754	volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
755	struct lance_private *lp = (struct lance_private *) dev->priv;
756	volatile struct lance_regs *ll = lp->ll;
757	int status = 0;
758
759	last_dev = dev;
760
761	/* Stop the Lance */
762	writereg(&ll->rap, LE_CSR0);
763	writereg(&ll->rdp, LE_C0_STOP);
764
765	/* Set mode and clear multicast filter only at device open,
766	 * so that lance_init_ring() called at any error will not
767	 * forget multicast filters.
768	 *
769	 * BTW it is common bug in all lance drivers! --ANK
770	 */
771	ib->mode = 0;
772	ib->filter [0] = 0;
773	ib->filter [2] = 0;
774	ib->filter [4] = 0;
775	ib->filter [6] = 0;
776
777	lance_init_ring(dev);
778	load_csrs(lp);
779
780	netif_start_queue(dev);
781
782	/* Associate IRQ with lance_interrupt */
783	if (request_irq(dev->irq, &lance_interrupt, 0, "lance", dev)) {
784		printk("lance: Can't get IRQ %d\n", dev->irq);
785		return -EAGAIN;
786	}
787	if (lp->dma_irq >= 0) {
788		unsigned long flags;
789
790		if (request_irq(lp->dma_irq, &lance_dma_merr_int, 0,
791				"lance error", dev)) {
792			free_irq(dev->irq, dev);
793			printk("lance: Can't get DMA IRQ %d\n", lp->dma_irq);
794			return -EAGAIN;
795		}
796
797		spin_lock_irqsave(&ioasic_ssr_lock, flags);
798
799		fast_mb();
800		/* Enable I/O ASIC LANCE DMA.  */
801		ioasic_write(SSR, ioasic_read(SSR) | LANCE_DMA_EN);
802
803		fast_mb();
804		spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
805	}
806
807	status = init_restart_lance(lp);
808
809	/*
810	 * if (!status)
811	 *      MOD_INC_USE_COUNT;
812	 */
813
814	return status;
815}
816
817static int lance_close(struct net_device *dev)
818{
819	struct lance_private *lp = (struct lance_private *) dev->priv;
820	volatile struct lance_regs *ll = lp->ll;
821
822	netif_stop_queue(dev);
823	del_timer_sync(&lp->multicast_timer);
824
825	/* Stop the card */
826	writereg(&ll->rap, LE_CSR0);
827	writereg(&ll->rdp, LE_C0_STOP);
828
829	if (lp->dma_irq >= 0) {
830		unsigned long flags;
831
832		spin_lock_irqsave(&ioasic_ssr_lock, flags);
833
834		fast_mb();
835		/* Disable I/O ASIC LANCE DMA.  */
836		ioasic_write(SSR, ioasic_read(SSR) & ~LANCE_DMA_EN);
837
838		fast_iob();
839		spin_unlock_irqrestore(&ioasic_ssr_lock, flags);
840
841		free_irq(lp->dma_irq, dev);
842	}
843	free_irq(dev->irq, dev);
844	/*
845	   MOD_DEC_USE_COUNT;
846	 */
847	return 0;
848}
849
850static inline int lance_reset(struct net_device *dev)
851{
852	struct lance_private *lp = (struct lance_private *) dev->priv;
853	volatile struct lance_regs *ll = lp->ll;
854	int status;
855
856	/* Stop the lance */
857	writereg(&ll->rap, LE_CSR0);
858	writereg(&ll->rdp, LE_C0_STOP);
859
860	lance_init_ring(dev);
861	load_csrs(lp);
862	dev->trans_start = jiffies;
863	status = init_restart_lance(lp);
864	return status;
865}
866
867static void lance_tx_timeout(struct net_device *dev)
868{
869	struct lance_private *lp = (struct lance_private *) dev->priv;
870	volatile struct lance_regs *ll = lp->ll;
871
872	printk(KERN_ERR "%s: transmit timed out, status %04x, reset\n",
873			       dev->name, ll->rdp);
874			lance_reset(dev);
875	netif_wake_queue(dev);
876}
877
878static int lance_start_xmit(struct sk_buff *skb, struct net_device *dev)
879{
880	struct lance_private *lp = (struct lance_private *) dev->priv;
881	volatile struct lance_regs *ll = lp->ll;
882	volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
883	int entry, skblen, len;
884
885	skblen = skb->len;
886
887	len = (skblen <= ETH_ZLEN) ? ETH_ZLEN : skblen;
888
889	lp->stats.tx_bytes += len;
890
891	entry = lp->tx_new & TX_RING_MOD_MASK;
892	ib->btx_ring[entry].length = (-len);
893	ib->btx_ring[entry].misc = 0;
894
895	cp_to_buf(lp->type, (char *)lp->tx_buf_ptr_cpu[entry], skb->data,
896		  skblen);
897
898	/* Clear the slack of the packet, do I need this? */
899	/* For a firewall its a good idea - AC */
900/*
901   if (len != skblen)
902   memset ((char *) &ib->tx_buf [entry][skblen], 0, (len - skblen) << 1);
903 */
904
905	/* Now, give the packet to the lance */
906	ib->btx_ring[entry].tmd1_bits = (LE_T1_POK | LE_T1_OWN);
907	lp->tx_new = (lp->tx_new + 1) & TX_RING_MOD_MASK;
908
909	if (TX_BUFFS_AVAIL <= 0)
910		netif_stop_queue(dev);
911
912	/* Kick the lance: transmit now */
913	writereg(&ll->rdp, LE_C0_INEA | LE_C0_TDMD);
914
915	spin_unlock_irq(&lp->lock);
916
917	dev->trans_start = jiffies;
918	dev_kfree_skb(skb);
919
920 	return 0;
921}
922
923static struct net_device_stats *lance_get_stats(struct net_device *dev)
924{
925	struct lance_private *lp = (struct lance_private *) dev->priv;
926
927	return &lp->stats;
928}
929
930static void lance_load_multicast(struct net_device *dev)
931{
932	volatile struct lance_init_block *ib = (struct lance_init_block *) (dev->mem_start);
933	volatile u16 *mcast_table = (u16 *) & ib->filter;
934	struct dev_mc_list *dmi = dev->mc_list;
935	char *addrs;
936	int i, j, bit, byte;
937	u32 crc;
938
939	/* set all multicast bits */
940	if (dev->flags & IFF_ALLMULTI) {
941		ib->filter[0] = 0xffff;
942		ib->filter[2] = 0xffff;
943		ib->filter[4] = 0xffff;
944		ib->filter[6] = 0xffff;
945		return;
946	}
947	/* clear the multicast filter */
948	ib->filter[0] = 0;
949	ib->filter[2] = 0;
950	ib->filter[4] = 0;
951	ib->filter[6] = 0;
952
953	/* Add addresses */
954	for (i = 0; i < dev->mc_count; i++) {
955		addrs = dmi->dmi_addr;
956		dmi = dmi->next;
957
958		/* multicast address? */
959		if (!(*addrs & 1))
960			continue;
961
962		crc = ether_crc_le(ETH_ALEN, addrs);
963		crc = crc >> 26;
964		mcast_table[2 * (crc >> 4)] |= 1 << (crc & 0xf);
965	}
966	return;
967}
968
969static void lance_set_multicast(struct net_device *dev)
970{
971	struct lance_private *lp = (struct lance_private *) dev->priv;
972	volatile struct lance_init_block *ib;
973	volatile struct lance_regs *ll = lp->ll;
974
975	ib = (struct lance_init_block *) (dev->mem_start);
976
977	if (!netif_running(dev))
978		return;
979
980	if (lp->tx_old != lp->tx_new) {
981		mod_timer(&lp->multicast_timer, jiffies + 4);
982		netif_wake_queue(dev);
983		return;
984	}
985
986	netif_stop_queue(dev);
987
988	writereg(&ll->rap, LE_CSR0);
989	writereg(&ll->rdp, LE_C0_STOP);
990
991	lance_init_ring(dev);
992
993	if (dev->flags & IFF_PROMISC) {
994		ib->mode |= LE_MO_PROM;
995	} else {
996		ib->mode &= ~LE_MO_PROM;
997		lance_load_multicast(dev);
998	}
999	load_csrs(lp);
1000	init_restart_lance(lp);
1001	netif_wake_queue(dev);
1002}
1003
1004static void lance_set_multicast_retry(unsigned long _opaque)
1005{
1006	struct net_device *dev = (struct net_device *) _opaque;
1007
1008	lance_set_multicast(dev);
1009}
1010
1011static int __init dec_lance_init(const int type, const int slot)
1012{
1013	static unsigned version_printed;
1014	struct net_device *dev;
1015	struct lance_private *lp;
1016	volatile struct lance_regs *ll;
1017	int i, ret;
1018	unsigned long esar_base;
1019	unsigned char *esar;
1020
1021#ifndef CONFIG_TC
1022	system_base = KN01_LANCE_BASE;
1023#endif
1024
1025	if (dec_lance_debug && version_printed++ == 0)
1026		printk(version);
1027
1028	dev = init_etherdev(NULL, sizeof(struct lance_private));
1029	if (!dev)
1030		return -ENOMEM;
1031	SET_MODULE_OWNER(dev);
1032
1033	/*
1034	 * init_etherdev ensures the data structures used by the LANCE
1035	 * are aligned.
1036	 */
1037	lp = (struct lance_private *) dev->priv;
1038	spin_lock_init(&lp->lock);
1039
1040	lp->type = type;
1041	lp->slot = slot;
1042	switch (type) {
1043#ifdef CONFIG_TC
1044	case ASIC_LANCE:
1045		dev->base_addr = system_base + LANCE;
1046
1047		/* buffer space for the on-board LANCE shared memory */
1048		dev->mem_start = KSEG1ADDR(0x00020000);
1049		dev->mem_end = dev->mem_start + 0x00020000;
1050		dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1051		esar_base = system_base + ESAR;
1052
1053		memset((void *)dev->mem_start, 0,
1054		       dev->mem_end - dev->mem_start);
1055
1056		/*
1057		 * setup the pointer arrays, this sucks [tm] :-(
1058		 */
1059		for (i = 0; i < RX_RING_SIZE; i++) {
1060			lp->rx_buf_ptr_cpu[i] =
1061				(char *)(dev->mem_start + BUF_OFFSET_CPU +
1062					 2 * i * RX_BUFF_SIZE);
1063			lp->rx_buf_ptr_lnc[i] =
1064				(char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1065		}
1066		for (i = 0; i < TX_RING_SIZE; i++) {
1067			lp->tx_buf_ptr_cpu[i] =
1068				(char *)(dev->mem_start + BUF_OFFSET_CPU +
1069					 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1070					 2 * i * TX_BUFF_SIZE);
1071			lp->tx_buf_ptr_lnc[i] =
1072				(char *)(BUF_OFFSET_LNC +
1073					 RX_RING_SIZE * RX_BUFF_SIZE +
1074					 i * TX_BUFF_SIZE);
1075		}
1076
1077		/* Setup I/O ASIC LANCE DMA.  */
1078		lp->dma_irq = dec_interrupt[DEC_IRQ_LANCE_MERR];
1079		ioasic_write(LANCE_DMA_P, PHYSADDR(dev->mem_start) << 3);
1080
1081		break;
1082
1083	case PMAD_LANCE:
1084		claim_tc_card(slot);
1085
1086		dev->mem_start = get_tc_base_addr(slot);
1087		dev->base_addr = dev->mem_start + 0x100000;
1088		dev->irq = get_tc_irq_nr(slot);
1089		esar_base = dev->mem_start + 0x1c0002;
1090		lp->dma_irq = -1;
1091
1092		for (i = 0; i < RX_RING_SIZE; i++) {
1093			lp->rx_buf_ptr_cpu[i] =
1094				(char *)(dev->mem_start + BUF_OFFSET_CPU +
1095					 i * RX_BUFF_SIZE);
1096			lp->rx_buf_ptr_lnc[i] =
1097				(char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1098		}
1099		for (i = 0; i < TX_RING_SIZE; i++) {
1100			lp->tx_buf_ptr_cpu[i] =
1101				(char *)(dev->mem_start + BUF_OFFSET_CPU +
1102					 RX_RING_SIZE * RX_BUFF_SIZE +
1103					 i * TX_BUFF_SIZE);
1104			lp->tx_buf_ptr_lnc[i] =
1105				(char *)(BUF_OFFSET_LNC +
1106					 RX_RING_SIZE * RX_BUFF_SIZE +
1107					 i * TX_BUFF_SIZE);
1108		}
1109
1110		break;
1111#endif
1112
1113	case PMAX_LANCE:
1114		dev->irq = dec_interrupt[DEC_IRQ_LANCE];
1115		dev->base_addr = KN01_LANCE_BASE;
1116		dev->mem_start = KN01_LANCE_BASE + 0x01000000;
1117		esar_base = KN01_RTC_BASE + 1;
1118		lp->dma_irq = -1;
1119
1120		/*
1121		 * setup the pointer arrays, this sucks [tm] :-(
1122		 */
1123		for (i = 0; i < RX_RING_SIZE; i++) {
1124			lp->rx_buf_ptr_cpu[i] =
1125				(char *)(dev->mem_start + BUF_OFFSET_CPU +
1126					 2 * i * RX_BUFF_SIZE);
1127			lp->rx_buf_ptr_lnc[i] =
1128				(char *)(BUF_OFFSET_LNC + i * RX_BUFF_SIZE);
1129		}
1130		for (i = 0; i < TX_RING_SIZE; i++) {
1131			lp->tx_buf_ptr_cpu[i] =
1132				(char *)(dev->mem_start + BUF_OFFSET_CPU +
1133					 2 * RX_RING_SIZE * RX_BUFF_SIZE +
1134					 2 * i * TX_BUFF_SIZE);
1135			lp->tx_buf_ptr_lnc[i] =
1136				(char *)(BUF_OFFSET_LNC +
1137					 RX_RING_SIZE * RX_BUFF_SIZE +
1138					 i * TX_BUFF_SIZE);
1139		}
1140
1141		break;
1142
1143	default:
1144		printk("declance_init called with unknown type\n");
1145		ret = -ENODEV;
1146		goto err_out;
1147	}
1148
1149	ll = (struct lance_regs *) dev->base_addr;
1150	esar = (unsigned char *) esar_base;
1151
1152	/* prom checks */
1153	/* First, check for test pattern */
1154	if (esar[0x60] != 0xff && esar[0x64] != 0x00 &&
1155	    esar[0x68] != 0x55 && esar[0x6c] != 0xaa) {
1156		printk("Ethernet station address prom not found!\n");
1157		ret = -ENODEV;
1158		goto err_out;
1159	}
1160	/* Check the prom contents */
1161	for (i = 0; i < 8; i++) {
1162		if (esar[i * 4] != esar[0x3c - i * 4] &&
1163		    esar[i * 4] != esar[0x40 + i * 4] &&
1164		    esar[0x3c - i * 4] != esar[0x40 + i * 4]) {
1165			printk("Something is wrong with the ethernet "
1166			       "station address prom!\n");
1167			ret = -ENODEV;
1168			goto err_out;
1169		}
1170	}
1171
1172	lp->next = root_lance_dev;
1173	root_lance_dev = dev;
1174
1175	/* Copy the ethernet address to the device structure, later to the
1176	 * lance initialization block so the lance gets it every time it's
1177	 * (re)initialized.
1178	 */
1179	switch (type) {
1180	case ASIC_LANCE:
1181		printk("%s: IOASIC onboard LANCE, addr = ", dev->name);
1182		break;
1183	case PMAD_LANCE:
1184		printk("%s: PMAD-AA, addr = ", dev->name);
1185		break;
1186	case PMAX_LANCE:
1187		printk("%s: PMAX onboard LANCE, addr = ", dev->name);
1188		break;
1189	}
1190	for (i = 0; i < 6; i++) {
1191		dev->dev_addr[i] = esar[i * 4];
1192		printk("%2.2x%c", dev->dev_addr[i], i == 5 ? ',' : ':');
1193	}
1194
1195	printk(" irq = %d\n", dev->irq);
1196
1197	dev->open = &lance_open;
1198	dev->stop = &lance_close;
1199	dev->hard_start_xmit = &lance_start_xmit;
1200	dev->tx_timeout = &lance_tx_timeout;
1201	dev->watchdog_timeo = 5*HZ;
1202	dev->get_stats = &lance_get_stats;
1203	dev->set_multicast_list = &lance_set_multicast;
1204
1205	/* lp->ll is the location of the registers for lance card */
1206	lp->ll = ll;
1207
1208	/* busmaster_regval (CSR3) should be zero according to the PMAD-AA
1209	 * specification.
1210	 */
1211	lp->busmaster_regval = 0;
1212
1213	dev->dma = 0;
1214
1215	/* We cannot sleep if the chip is busy during a
1216	 * multicast list update event, because such events
1217	 * can occur from interrupts (ex. IPv6).  So we
1218	 * use a timer to try again later when necessary. -DaveM
1219	 */
1220	init_timer(&lp->multicast_timer);
1221	lp->multicast_timer.data = (unsigned long) dev;
1222	lp->multicast_timer.function = &lance_set_multicast_retry;
1223
1224	return 0;
1225
1226err_out:
1227	unregister_netdev(dev);
1228	kfree(dev);
1229	return ret;
1230}
1231
1232
1233/* Find all the lance cards on the system and initialize them */
1234static int __init dec_lance_probe(void)
1235{
1236	int count = 0;
1237
1238	/* Scan slots for PMAD-AA cards first. */
1239#ifdef CONFIG_TC
1240	if (TURBOCHANNEL) {
1241		int slot;
1242
1243		while ((slot = search_tc_card("PMAD-AA")) >= 0) {
1244			if (dec_lance_init(PMAD_LANCE, slot) < 0)
1245				break;
1246			count++;
1247		}
1248	}
1249#endif
1250
1251	/* Then handle onboard devices. */
1252	if (dec_interrupt[DEC_IRQ_LANCE] >= 0) {
1253		if (dec_interrupt[DEC_IRQ_LANCE_MERR] >= 0) {
1254#ifdef CONFIG_TC
1255			if (dec_lance_init(ASIC_LANCE, -1) >= 0)
1256				count++;
1257#endif
1258		} else if (!TURBOCHANNEL) {
1259			if (dec_lance_init(PMAX_LANCE, -1) >= 0)
1260				count++;
1261		}
1262	}
1263
1264	return (count > 0) ? 0 : -ENODEV;
1265}
1266
1267static void __exit dec_lance_cleanup(void)
1268{
1269	while (root_lance_dev) {
1270		struct net_device *dev = root_lance_dev;
1271		struct lance_private *lp = (struct lance_private *)dev->priv;
1272
1273#ifdef CONFIG_TC
1274		if (lp->slot >= 0)
1275			release_tc_card(lp->slot);
1276#endif
1277		root_lance_dev = lp->next;
1278		unregister_netdev(dev);
1279		kfree(dev);
1280	}
1281}
1282
1283module_init(dec_lance_probe);
1284module_exit(dec_lance_cleanup);
1285