Searched refs:IT8172_PCI_IO_BASE (Results 1 - 14 of 14) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/i2c/
H A Di2c-ite.h39 #define ITE_I2CHCR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x30
40 #define ITE_I2CHSR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x34
41 #define ITE_I2CSAR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x38
42 #define ITE_I2CSSAR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x3c
43 #define ITE_I2CCKCNT IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x48
44 #define ITE_I2CSHDR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x4c
45 #define ITE_I2CRSUR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x50
46 #define ITE_I2CPSUR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x54
48 #define ITE_I2CFDR IT8172_PCI_IO_BASE + IT_I2C_BASE + 0x70
49 #define ITE_I2CFBCR IT8172_PCI_IO_BASE
[all...]
H A Di2c-algo-ite.c52 #define PM_DSR IT8172_PCI_IO_BASE + IT_PM_DSR
53 #define PM_IBSR IT8172_PCI_IO_BASE + IT_PM_DSR + 0x04
54 #define GPIO_CCR IT8172_PCI_IO_BASE + IT_GPCCR
/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/ite-boards/generic/
H A Dit8172_rtc.c32 #define IT8172_RTC_ADR_REG (IT8172_PCI_IO_BASE + IT_RTC_BASE)
H A Dit8172_setup.c253 IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SFR);
255 IT8172_PCI_IO_BASE + IT_SCR0_BASE + IT_SCR_SCDR);
272 IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SFR);
274 IT8172_PCI_IO_BASE + IT_SCR1_BASE + IT_SCR_SCDR);
H A Dit8172_cir.c45 (volatile struct it8172_cir_regs *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_CIR0_BASE)),
46 (volatile struct it8172_cir_regs *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_CIR1_BASE))};
H A Dirq.c88 = (struct it8172_intc_regs volatile *)(KSEG1ADDR(IT8172_PCI_IO_BASE + IT_INTC_BASE));
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/it8172/
H A Dit8172.h37 #define IT8172_PCI_IO_BASE 0x14000000 macro
51 // Power management register offset from IT8172_PCI_IO_BASE
137 // Register offset from IT8172_PCI_IO_BASE
340 #define IT_IO_WRITE(ofs, data) *(volatile u32 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs)) = data
341 #define IT_IO_READ(ofs, data) data = *(volatile u32 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs))
343 #define IT_IO_WRITE16(ofs, data) *(volatile u16 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs)) = data
344 #define IT_IO_READ16(ofs, data) data = *(volatile u16 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs))
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/it8172/
H A Dit8172.h37 #define IT8172_PCI_IO_BASE 0x14000000 macro
51 // Power management register offset from IT8172_PCI_IO_BASE
137 // Register offset from IT8172_PCI_IO_BASE
340 #define IT_IO_WRITE(ofs, data) *(volatile u32 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs)) = data
341 #define IT_IO_READ(ofs, data) data = *(volatile u32 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs))
343 #define IT_IO_WRITE16(ofs, data) *(volatile u16 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs)) = data
344 #define IT_IO_READ16(ofs, data) data = *(volatile u16 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs))
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/it8172/
H A Dit8172.h37 #define IT8172_PCI_IO_BASE 0x14000000 macro
51 // Power management register offset from IT8172_PCI_IO_BASE
137 // Register offset from IT8172_PCI_IO_BASE
340 #define IT_IO_WRITE(ofs, data) *(volatile u32 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs)) = data
341 #define IT_IO_READ(ofs, data) data = *(volatile u32 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs))
343 #define IT_IO_WRITE16(ofs, data) *(volatile u16 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs)) = data
344 #define IT_IO_READ16(ofs, data) data = *(volatile u16 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs))
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/it8172/
H A Dit8172.h37 #define IT8172_PCI_IO_BASE 0x14000000 macro
51 // Power management register offset from IT8172_PCI_IO_BASE
137 // Register offset from IT8172_PCI_IO_BASE
340 #define IT_IO_WRITE(ofs, data) *(volatile u32 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs)) = data
341 #define IT_IO_READ(ofs, data) data = *(volatile u32 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs))
343 #define IT_IO_WRITE16(ofs, data) *(volatile u16 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs)) = data
344 #define IT_IO_READ16(ofs, data) data = *(volatile u16 *)KSEG1ADDR((IT8172_PCI_IO_BASE+ofs))
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/
H A Dserial.h129 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \
131 { .baud_base = (24000000/(16*13)), .port = (IT8172_PCI_IO_BASE + IT8712_UART1_PORT), \
134 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR0_BASE), \
137 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \
147 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \
150 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/
H A Dserial.h129 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \
131 { .baud_base = (24000000/(16*13)), .port = (IT8172_PCI_IO_BASE + IT8712_UART1_PORT), \
134 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR0_BASE), \
137 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \
147 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \
150 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/
H A Dserial.h129 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \
131 { .baud_base = (24000000/(16*13)), .port = (IT8172_PCI_IO_BASE + IT8712_UART1_PORT), \
134 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR0_BASE), \
137 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \
147 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \
150 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/
H A Dserial.h129 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \
131 { .baud_base = (24000000/(16*13)), .port = (IT8172_PCI_IO_BASE + IT8712_UART1_PORT), \
134 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR0_BASE), \
137 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \
147 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_UART_BASE), \
150 { .baud_base = BASE_BAUD, .port = (IT8172_PCI_IO_BASE + IT_SCR1_BASE), \

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