Searched refs:INTSTAT (Results 1 - 14 of 14) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/momentum/ocelot_c/
H A Dcpci-irq.c123 irq_src = OCELOT_FPGA_READ(INTSTAT);
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/net/
H A Depic100.c273 COMMAND=0, INTSTAT=4, INTMASK=8, GENCTL=0x0C, NVCTL=0x10, EECTL=0x14, enumerator in enum:epic_registers
848 (int)inl(ioaddr + INTSTAT));
886 (int)inl(ioaddr + INTSTAT), (int)inl(ioaddr + RxSTAT));
1034 status = inl(ioaddr + INTSTAT);
1036 outl(status & 0x00007fff, ioaddr + INTSTAT);
1041 dev->name, status, (int)inl(ioaddr + INTSTAT));
1138 outl(status & 0x7f18, ioaddr + INTSTAT);
1145 outl(0x0001ffff, ioaddr + INTSTAT);
1255 dev->name, (int)inl(ioaddr + INTSTAT));
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/scsi/aic7xxx/
H A Daic7xxx_inline.h106 if ((ahc_inb(ahc, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) == 0)
499 intstat = ahc_inb(ahc, INTSTAT);
H A Daic7xxx_reg.h453 #define INTSTAT 0x91 macro
H A Daic7xxx_pci.c1138 if ((ahc_inb(ahc, INTSTAT) & BRKADRINT) == 0
1150 && ((ahc_inb(ahc, INTSTAT) & BRKADRINT) == 0
H A Daic7xxx_osm.h1000 ahc_inb(ahc, INTSTAT);
H A Daic7xxx_osm.c2664 } while ((ahc_inb(ahc, INTSTAT) & INT_PEND) != 0
H A Daic7xxx_core.c4797 } while (((intstat = ahc_inb(ahc, INTSTAT)) & INT_PEND) && --maxloops);
4799 printf("Infinite interrupt loop, INTSTAT = %x",
4800 ahc_inb(ahc, INTSTAT));
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/scsi/
H A Daha152x.h278 #define INTSTAT 0x20 macro
H A Daha152x.c1397 if (TESTHI(DMASTAT, INTSTAT)) {
1492 return TESTHI(DMASTAT, INTSTAT);
2610 while(TESTLO(DMASTAT, INTSTAT) || TESTLO(DMASTAT, DFIFOEMP) || TESTLO(SSTAT2, SEMPTY)) {
2612 while(TESTLO(DMASTAT, DFIFOFULL|INTSTAT) && time_before(jiffies,the_time))
2615 if(TESTLO(DMASTAT, DFIFOFULL|INTSTAT)) {
2684 if(TESTLO(DMASTAT, INTSTAT) ||
2745 while(TESTLO(DMASTAT, INTSTAT) && CURRENT_SC->SCp.this_residual>0) {
2781 while(TESTLO(DMASTAT, DFIFOEMP|INTSTAT) && time_before(jiffies,the_time))
2784 if(TESTLO(DMASTAT, DFIFOEMP|INTSTAT)) {
3110 printk("INTSTAT (
[all...]
H A DcpqfcTSinit.c182 cpqfcHBAdata->fcChip.Registers.INTSTAT.address =
1700 IntStat = readb( cpqfcHBA->fcChip.Registers.INTSTAT.address);
H A DcpqfcTSstructs.h580 FCREGISTER INTSTAT; // interrupt status member in struct:__anon2290
H A Daic7xxx_old.c1591 ( !(aic_inb(p, INTSTAT) & (SCSIINT | SEQINT | BRKADRINT)) &&
5350 printk(WARN_LEAD "Unknown SEQINT, INTSTAT 0x%x, SCSISIGI 0x%x.\n",
6717 * Read the INTSTAT location after clearing the CMDINT bit. This forces
6723 aic_inb(p, INTSTAT);
6838 if (!((intstat = aic_inb(p, INTSTAT)) & INT_PEND))
6972 } while ( (aic_inb(p, INTSTAT) & INT_PEND) );
8697 if(aic_inb(p, INTSTAT) & INT_PEND)
11107 while ( (aic_inb(p, INTSTAT) & INT_PEND) && !(p->flags & AHC_IN_ISR))
11483 while((aic_inb(p, INTSTAT) & INT_PEND) && !(p->flags & AHC_IN_ISR))
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/scsi/aic7xxx_old/
H A Daic7xxx_reg.h395 #define INTSTAT 0x91 macro

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