Searched refs:CyTDR (Results 1 - 6 of 6) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/linux/
H A Dserial167.h120 #define CyTDR (0xf8) macro
H A Dcyclades.h726 #define CyTDR (0x63*2) macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/linux/
H A Dserial167.h120 #define CyTDR (0xf8) macro
H A Dcyclades.h723 #define CyTDR (0x63*2) macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/char/
H A Dserial167.c571 base_addr[CyTDR] = outch;
586 base_addr[CyTDR] = 0; /* start break */
587 base_addr[CyTDR] = 0x81;
588 base_addr[CyTDR] = 0; /* delay a bit */
589 base_addr[CyTDR] = 0x82;
590 base_addr[CyTDR] = info->x_break*200/HZ;
591 base_addr[CyTDR] = 0; /* terminate break */
592 base_addr[CyTDR] = 0x83;
626 base_addr[CyTDR] = outch;
633 base_addr[CyTDR]
[all...]
H A Dcyclades.c748 cy_writeb((u_long)base_addr+(CyTDR<<index), outch);
756 cy_writeb((u_long)base_addr + (CyTDR<<index), 0);
757 cy_writeb((u_long)base_addr + (CyTDR<<index), 0x81);
762 cy_writeb((u_long)base_addr + (CyTDR<<index), 0);
763 cy_writeb((u_long)base_addr + (CyTDR<<index), 0x83);
811 cy_writeb((u_long)base_addr+(CyTDR<<index), outch);
818 cy_writeb((u_long)base_addr+(CyTDR<<index),
820 cy_writeb((u_long)base_addr+(CyTDR<<index), 0);

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