Searched refs:CP0_ENTRYLO1 (Results 1 - 11 of 11) sorted by relevance
| /asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/mm/ |
| H A D | tlbex-r4k.S | 94 P_MTC0 tmp, CP0_ENTRYLO1; \
184 P_MTC0 k1, CP0_ENTRYLO1 # load it
210 P_MTC0 k1, CP0_ENTRYLO1
237 P_MTC0 k1, CP0_ENTRYLO1 # load it
270 P_MTC0 k1, CP0_ENTRYLO1 # load it
301 P_MTC0 k1, CP0_ENTRYLO1
333 P_MTC0 k1, CP0_ENTRYLO1
363 P_MTC0 zero, CP0_ENTRYLO1
364 P_MTC0 k1, CP0_ENTRYLO1
397 P_MTC0 zero, CP0_ENTRYLO1
[all...] |
| /asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/kernel/ |
| H A D | gdb-low.S | 170 mfc0 v0,CP0_ENTRYLO1
207 mtc0 v1,CP0_ENTRYLO1
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips64/mm/ |
| H A D | tlbex-r4k.S | 88 dmtc0 \pte1, CP0_ENTRYLO1 # load it
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips64/kernel/ |
| H A D | head.S | 73 mtc0 t0, CP0_ENTRYLO1 # physaddr, DVG, cach exlwr
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| /asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/ |
| H A D | mipsregs.h | 45 #define CP0_ENTRYLO1 $3 macro
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| /asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips64/ |
| H A D | mipsregs.h | 45 #define CP0_ENTRYLO1 $3 macro
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/ |
| H A D | mipsregs.h | 45 #define CP0_ENTRYLO1 $3 macro
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips64/ |
| H A D | mipsregs.h | 45 #define CP0_ENTRYLO1 $3 macro
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| /asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/ |
| H A D | mipsregs.h | 45 #define CP0_ENTRYLO1 $3 macro
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/ |
| H A D | mipsregs.h | 45 #define CP0_ENTRYLO1 $3 macro
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/arch/mips/galileo-boards/ev64120/compressed/ |
| H A D | sbdreset_evb64120A.S | 31 #define C0_TLBLO1 CP0_ENTRYLO1
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