| /asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-arm/arch-integrator/ |
| H A D | bits.h | 29 #define BIT3 0x00000008 macro
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-arm/arch-integrator/ |
| H A D | bits.h | 29 #define BIT3 0x00000008 macro
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/scsi/ |
| H A D | tmscsim.h | 285 #define BIT3 0x00000008 macro
294 #define UNIT_RETRY BIT3
306 #define SRB_MSGIN BIT3
323 #define UNDER_RUN BIT3
385 #define WIDE_NEGO_DONE BIT3 /* Not used ;-) */
491 #define SEND_START_ BIT3
498 #define ACTIVE_NEGATION BIT3
548 #define GROUP_CODE_VALID BIT3
557 #define SUCCESSFUL_OP BIT3
563 #define SYNC_OFFSET_FLAG BIT3
[all...] |
| /asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/galileo-boards/evb64120A/ |
| H A D | dma.h | 20 #define HOLD_SOURCE_ADDRESS BIT3
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| H A D | core.h | 20 #define BIT3 0x00000008 macro
164 * SET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic
175 * RESET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/galileo-boards/evb64120A/ |
| H A D | dma.h | 20 #define HOLD_SOURCE_ADDRESS BIT3
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| H A D | core.h | 20 #define BIT3 0x00000008 macro
164 * SET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic
175 * RESET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic
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| /asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/galileo-boards/evb64120A/ |
| H A D | dma.h | 20 #define HOLD_SOURCE_ADDRESS BIT3
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| H A D | core.h | 20 #define BIT3 0x00000008 macro
164 * SET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic
175 * RESET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/galileo-boards/evb64120A/ |
| H A D | dma.h | 20 #define HOLD_SOURCE_ADDRESS BIT3
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| H A D | core.h | 20 #define BIT3 0x00000008 macro
164 * SET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic
175 * RESET_REG_BITS(0x840,BIT3 | BIT24 | BIT30) - set bits: 3,24 and 30 to logic
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| /asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/linux/ |
| H A D | synclink.h | 23 #define BIT3 0x0008 macro
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/include/linux/ |
| H A D | synclink.h | 23 #define BIT3 0x0008 macro
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| /asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/char/pcmcia/ |
| H A D | synclink_cs.c | 342 #define PVR_AUTOCTS BIT3
883 #define CMD_TXFIFO BIT3 // release current tx FIFO
1406 if (gis & (BIT3 + BIT2))
3576 val |= BIT3;
3585 val |= BIT4 + BIT3;
3716 set_reg_bits(info, CHA + PVR, BIT3);
3718 clear_reg_bits(info, CHA + PVR, BIT3);
3753 clear_reg_bits(info, CHA + MODE, BIT3);
3770 set_reg_bits(info, CHA + MODE, BIT3);
3986 val |= BIT3;
[all...] |
| /asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/char/ |
| H A D | synclinkmp.c | 449 #define CCTS BIT3
465 #define OVRN BIT3
1666 RegValue |= BIT3;
1668 RegValue &= ~BIT3;
2538 if (status & BIT3 << shift)
2547 if (dmastatus & BIT3 << shift)
4410 case 6: RegValue |= BIT5 + BIT3; break;
4411 case 5: RegValue |= BIT5 + BIT4 + BIT3 + BIT2; break;
4581 RegValue |= BIT3;
4743 if (!(status & BIT3))
[all...] |
| H A D | synclink.c | 525 #define TRANSMIT_STATUS BIT3
542 #define RXSTATUS_CRC_ERROR BIT3
543 #define RXSTATUS_FRAMING_ERROR BIT3
582 #define TXSTATUS_CRC_SENT BIT3
602 #define MISCSTATUS_RCC_UNDERRUN BIT3
628 #define SICR_RCC_UNDERFLOW BIT3
662 #define TXSTATUS_CRC_SENT BIT3
1486 usc_OutReg( info, RICR+LSBONLY, (u16)(usc_InReg(info, RICR+LSBONLY) & ~BIT3 ));
1611 * BIT3 EOA/EOL End of List, all receive buffers in receive
1641 if ( status & BIT3 ) {
[all...] |
| /asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/acpi/include/ |
| H A D | acmacros.h | 54 #define BIT3(x) ((((x) & 0x08) > 0) ? 1 : 0) macro
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