Searched refs:BIT12 (Results 1 - 15 of 15) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-arm/arch-integrator/
H A Dbits.h38 #define BIT12 0x00001000 macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-arm/arch-integrator/
H A Dbits.h38 #define BIT12 0x00001000 macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm-mips/galileo-boards/evb64120A/
H A Ddma.h33 #define CHANNEL_ENABLE BIT12
H A Dcore.h29 #define BIT12 0x00001000 macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm-mips/galileo-boards/evb64120A/
H A Ddma.h33 #define CHANNEL_ENABLE BIT12
H A Dcore.h29 #define BIT12 0x00001000 macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/asm/galileo-boards/evb64120A/
H A Ddma.h33 #define CHANNEL_ENABLE BIT12
H A Dcore.h29 #define BIT12 0x00001000 macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/asm/galileo-boards/evb64120A/
H A Ddma.h33 #define CHANNEL_ENABLE BIT12
H A Dcore.h29 #define BIT12 0x00001000 macro
/asus-wl-520gu-7.0.1.45/src/router/iproute2/reference/linux/
H A Dsynclink.h32 #define BIT12 0x1000 macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/include/linux/
H A Dsynclink.h32 #define BIT12 0x1000 macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/scsi/
H A Dtmscsim.h276 #define BIT12 0x00001000 macro
315 #define SRB_ABORT_SENT BIT12
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/char/
H A Dsynclink.c593 #define MISCSTATUS_TXC BIT12
614 #define SICR_TXC_INACTIVE BIT12
615 #define SICR_TXC (BIT13+BIT12)
1883 usc_OutReg(info, PCR, (u16)((usc_InReg(info, PCR) | BIT13) | BIT12));
5010 (unsigned short)((usc_InReg(info, IOCR) & ~(BIT13|BIT12)) | BIT12));
5044 RegValue |= BIT12;
5086 RegValue |= ( BIT12 | BIT10 | BIT9 );
5161 RegValue |= ( BIT12 | BIT10 | BIT9 | BIT8);
5475 case HDLC_PREAMBLE_PATTERN_FLAGS: RegValue |= BIT8 + BIT12; brea
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/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/char/pcmcia/
H A Dsynclink_cs.c321 #define IRQ_UNDERRUN BIT12 // transmit data underrun

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