Searched refs:BA0_MIDCR (Results 1 - 4 of 4) sorted by relevance

/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/sound/cs4281/
H A Dcs4281m.c1342 pm->u32MIDCR_Save = readl(s->pBA0 + BA0_MIDCR);
1460 writel(pm->u32MIDCR_Save, s->pBA0 + BA0_MIDCR);
4092 writel(1, s->pBA0 + BA0_MIDCR); // Reset the interface.
4093 writel(0, s->pBA0 + BA0_MIDCR); // Return to normal mode.
4095 writel(0x0000000f, s->pBA0 + BA0_MIDCR); // Enable transmit, record, ints.
4162 writel(0, s->pBA0 + BA0_MIDCR); // Disable Midi interrupts.
H A Dcs4281_hwdefs.h124 #define BA0_MIDCR 0x00000490L macro
/asus-wl-520gu-7.0.1.45/src/linux/linux/drivers/sound/
H A Dcs461x.h110 #define BA0_MIDCR 0x00000490 macro
H A Dcs46xx.c1878 cs461x_pokeBA0(card, BA0_MIDCR, 0x0000000f); /* Enable xmit, rcv. */
5461 cs461x_pokeBA0(card, BA0_MIDCR, MIDCR_MRST);
5462 cs461x_pokeBA0(card, BA0_MIDCR, 0);

Completed in 120 milliseconds