Searched refs:tile (Results 76 - 100 of 138) sorted by relevance

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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/gr/
H A Dgf117.c136 data |= bank[gr->tile[i + j]] << (j * 4);
137 bank[gr->tile[i + j]]++;
H A Dgm200.c168 memcpy(gr->tile, gm200_gr_tile_map_2_8, gr->tpc_total);
172 memcpy(gr->tile, gm200_gr_tile_map_4_16, gr->tpc_total);
176 memcpy(gr->tile, gm200_gr_tile_map_6_24, gr->tpc_total);
H A Dtu102.c65 data |= bank[gr->tile[i + j]] << (j * 4);
66 bank[gr->tile[i + j]]++;
H A Dctxgf117.c205 /* Pack tile map into register format. */
207 data[i / 6] |= (gr->tile[i] & 0x07) << ((i % 6) * 5);
H A Dnv34.c108 .tile = nv20_gr_tile,
H A Dnv35.c108 .tile = nv20_gr_tile,
H A Dnv25.c109 .tile = nv20_gr_tile,
/linux-master/drivers/gpu/drm/xe/
H A Dxe_vm_types.h154 #define XE_VM_FLAG_SET_TILE_ID(tile) FIELD_PREP(GENMASK(7, 6), (tile)->id)
H A Dxe_ttm_stolen_mgr.c61 struct xe_tile *tile = xe_device_get_root_tile(xe); local
68 tile_offset = tile->mem.vram.io_start - xe->mem.vram.io_start;
69 tile_size = tile->mem.vram.actual_physical_size;
80 mgr->io_base = tile->mem.vram.io_start + mgr->stolen_base;
H A Dxe_gt_debugfs.c69 struct xe_tile *tile = gt_to_tile(node_to_gt(m->private)); local
72 drm_suballoc_dump_debug_info(&tile->mem.kernel_bb_pool->base, &p,
73 tile->mem.kernel_bb_pool->gpu_addr);
H A Dxe_pm.c90 struct xe_tile *tile; local
95 for_each_tile(tile, xe, id)
96 xe_wa_apply_tile_workarounds(tile);
H A Dxe_vm.c857 struct xe_tile *tile; local
899 for_each_tile(tile, vm->xe, id)
1281 * given tile and vm.
1283 * @tile: tile to set up for.
1293 static int xe_vm_create_scratch(struct xe_device *xe, struct xe_tile *tile, argument
1296 u8 id = tile->id;
1300 vm->scratch_pt[id][i] = xe_pt_create(vm, tile, i);
1304 xe_pt_populate_empty(tile, vm, vm->scratch_pt[id][i]);
1312 struct xe_tile *tile; local
1335 struct xe_tile *tile; local
1495 struct xe_tile *tile; local
1603 struct xe_tile *tile; local
1645 xe_vm_pdp4_descriptor(struct xe_vm *vm, struct xe_tile *tile) argument
1664 struct xe_tile *tile; local
1748 struct xe_tile *tile; local
1926 struct xe_tile *tile; local
3256 struct xe_tile *tile; local
[all...]
H A Dxe_pci.c572 * Make sure that GT / tile structures allocated by the driver match the data
580 struct xe_tile *tile; local
634 for_each_remote_tile(tile, xe, id) {
637 err = xe_tile_init_early(tile, xe, id);
642 for_each_tile(tile, xe, id) {
643 gt = tile->primary_gt;
657 tile->media_gt = xe_gt_alloc(tile);
658 if (IS_ERR(tile->media_gt))
659 return PTR_ERR(tile
[all...]
H A Dxe_device.c393 * Initialize MMIO resources that don't require any knowledge about tile count.
436 struct xe_tile *tile; local
464 for_each_tile(tile, xe, id) {
465 err = xe_ggtt_init_early(tile->mem.ggtt);
469 err = xe_memirq_init(&tile->sriov.vf.memirq);
513 for_each_tile(tile, xe, id) {
514 err = xe_tile_init_noalloc(tile);
H A Dxe_guc.c277 struct xe_tile *tile = gt_to_tile(guc_to_gt(guc)); local
284 ret = xe_managed_bo_reinit_in_vram(xe, tile, &guc->fw.bo);
288 ret = xe_managed_bo_reinit_in_vram(xe, tile, &guc->log.bo);
292 ret = xe_managed_bo_reinit_in_vram(xe, tile, &guc->ads.bo);
296 ret = xe_managed_bo_reinit_in_vram(xe, tile, &guc->ct.bo);
650 struct xe_tile *tile = gt_to_tile(gt); local
652 err = xe_memirq_init_guc(&tile->sriov.vf.memirq, guc);
H A Dxe_lmtt.c188 struct xe_tile *tile = lmtt_to_tile(lmtt); local
189 struct xe_device *xe = tile_to_xe(tile);
196 xe_mmio_write32(tile->primary_gt,
/linux-master/drivers/pinctrl/qcom/
H A Dpinctrl-msm.h87 unsigned int tile:2; member in struct:msm_pingroup
/linux-master/drivers/gpu/drm/xe/display/
H A Dxe_fb_pin.c193 xe_device_mem_access_get(tile_to_xe(ggtt->tile));
245 xe_device_mem_access_put(tile_to_xe(ggtt->tile));
264 struct xe_tile *tile = xe_device_get_root_tile(xe); local
272 if (tile->mem.vram.io_size < tile->mem.vram.usable_size) {
/linux-master/drivers/gpu/drm/radeon/
H A Dcik.c2322 u32 *tile = rdev->config.cik.tile_mode_array; local
2351 tile[reg_offset] = 0;
2357 tile[0] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2361 tile[1] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2365 tile[2] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2369 tile[3] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2373 tile[4] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2377 tile[5] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
2380 tile[6] = (ARRAY_MODE(ARRAY_PRT_2D_TILED_THIN1) |
2384 tile[
[all...]
H A Dsi.c2471 u32 *tile = rdev->config.si.tile_mode_array; local
2490 tile[reg_offset] = 0;
2496 tile[0] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2505 tile[1] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2514 tile[2] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2523 tile[3] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2531 /* Maps w/ a dimension less than the 2D macro-tile dimensions (for mipmapped depth textures) */
2532 tile[4] = (ARRAY_MODE(ARRAY_1D_TILED_THIN1) |
2541 tile[5] = (ARRAY_MODE(ARRAY_2D_TILED_THIN1) |
2550 tile[
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dpriv.h43 } tile; member in struct:nvkm_fb_func
/linux-master/tools/testing/selftests/kvm/x86_64/
H A Damx_test.c68 static inline void __tileloadd(void *tile) argument
71 : : "a"(tile), "d"(0));
297 /* Only check TMM0 register, 1 tile */
/linux-master/drivers/gpu/drm/amd/pm/swsmu/inc/pmfw_if/
H A Dsmu14_driver_if_v14_0_0.h225 //ISP tile definitions
242 #define ISP_TILE_SEL(tile) (1<<tile)
/linux-master/drivers/media/platform/mediatek/vcodec/decoder/vdec/
H A Dvdec_vp9_req_lat_if.c247 * struct vdec_vp9_slice_tiles - vp9 tile syntax
342 * @tile: tile buffer
361 struct vdec_vp9_slice_mem tile; member in struct:vdec_vp9_slice_vsi
431 * @tile: tile buffer
468 * mv[0]/seg[0]/tile/prob/counts is used for LAT
473 struct mtk_vcodec_mem tile; member in struct:vdec_vp9_slice_instance
608 if (!instance->tile.va) {
609 instance->tile
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/mpeg/
H A Dnv44.c196 .tile = nv31_mpeg_tile,

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