Searched refs:bw (Results 76 - 100 of 389) sorted by relevance

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/linux-master/drivers/net/wireless/realtek/rtw88/
H A Dphy.h47 enum rtw_bandwidth bw, u8 channel, u8 regd);
71 u8 bw; member in struct:rtw_txpwr_lmt_cfg_pair
156 u8 rate, u8 bw, u8 ch, u8 regd,
H A Drtw8822b.c420 static void rtw8822b_set_channel_cca(struct rtw_dev *rtwdev, u8 channel, u8 bw, argument
471 bw == RTW_CHANNEL_WIDTH_40) ||
473 bw == RTW_CHANNEL_WIDTH_40) ||
485 if (bw == RTW_CHANNEL_WIDTH_20 && IS_CH_5G_BAND_MID(channel))
497 static void rtw8822b_set_channel_rf(struct rtw_dev *rtwdev, u8 channel, u8 bw) argument
527 switch (bw) {
590 static void rtw8822b_set_channel_rxdfir(struct rtw_dev *rtwdev, u8 bw) argument
592 if (bw == RTW_CHANNEL_WIDTH_40) {
597 } else if (bw == RTW_CHANNEL_WIDTH_80) {
610 static void rtw8822b_set_channel_bb(struct rtw_dev *rtwdev, u8 channel, u8 bw, argument
716 rtw8822b_set_channel(struct rtw_dev *rtwdev, u8 channel, u8 bw, u8 primary_chan_idx) argument
858 u8 rxsc, bw; local
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H A Drtw8821c.c310 static void rtw8821c_set_channel_rf(struct rtw_dev *rtwdev, u8 channel, u8 bw) argument
328 switch (bw) {
361 static void rtw8821c_set_channel_rxdfir(struct rtw_dev *rtwdev, u8 bw) argument
363 if (bw == RTW_CHANNEL_WIDTH_40) {
369 } else if (bw == RTW_CHANNEL_WIDTH_80) {
384 static void rtw8821c_cck_tx_filter_srrc(struct rtw_dev *rtwdev, u8 channel, u8 bw) argument
405 (channel == 11 && bw == RTW_CHANNEL_WIDTH_40)) {
443 static void rtw8821c_set_channel_bb(struct rtw_dev *rtwdev, u8 channel, u8 bw, argument
459 rtw8821c_cck_tx_filter_srrc(rtwdev, channel, bw);
500 switch (bw) {
568 rtw8821c_set_channel_bb_swing(struct rtw_dev *rtwdev, u8 channel, u8 bw, u8 primary_ch_idx) argument
576 rtw8821c_set_channel(struct rtw_dev *rtwdev, u8 channel, u8 bw, u8 primary_chan_idx) argument
637 u8 rxsc, bw; local
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/linux-master/drivers/net/wireless/mediatek/mt76/mt7915/
H A Dtestmode.c311 rate.bw = RATE_INFO_BW_160;
314 rate.bw = RATE_INFO_BW_80;
317 rate.bw = RATE_INFO_BW_40;
320 rate.bw = RATE_INFO_BW_20;
536 tx_cont->bw = CMD_CBW_40MHZ;
539 tx_cont->bw = CMD_CBW_80MHZ;
542 tx_cont->bw = CMD_CBW_8080MHZ;
545 tx_cont->bw = CMD_CBW_160MHZ;
548 tx_cont->bw = CMD_CBW_5MHZ;
551 tx_cont->bw
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/linux-master/drivers/usb/misc/sisusbvga/
H A Dsisusbvga.c1383 int *bw, int *chab)
1418 *chab = 0; *bw = 64;
1422 *chab = 0; *bw = 64;
1427 *chab = 1; *bw = 64;
1440 *bw = 32;
1447 *chab = 0; *bw = 64; /* default: cha, bw = 64 */
1453 *chab = 0; *bw = 64;
1458 *chab = 0; *bw = 32;
1481 *chab = 1; *bw
1382 sisusb_getbuswidth(struct sisusb_usb_data *sisusb, int *bw, int *chab) argument
1523 sisusb_set_rank(struct sisusb_usb_data *sisusb, int *iret, int index, u8 rankno, u8 chab, const u8 dramtype[][5], int bw) argument
1580 sisusb_check_ranks(struct sisusb_usb_data *sisusb, int *iret, int rankno, int idx, int bw, const u8 rtype[][5]) argument
1610 sisusb_get_sdram_size(struct sisusb_usb_data *sisusb, int *iret, int bw, int chab) argument
1822 int ret = 0, i, j, bw, chab, iret, retry = 3; local
2022 int bw = 0; local
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/linux-master/drivers/net/wireless/broadcom/brcm80211/brcmsmac/
H A Drate.c444 uint rate_mask, bool mcsallow, u8 bw, u8 txstreams)
453 rs_dflt = (bw == BRCMS_20_MHZ ?
456 rs_dflt = (bw == BRCMS_20_MHZ ?
508 void brcms_c_rateset_bw_mcs_filter(struct brcms_c_rateset *rateset, u8 bw) argument
510 if (bw == BRCMS_40_MHZ)
441 brcms_c_rateset_default(struct brcms_c_rateset *rs_tgt, const struct brcms_c_rateset *rs_hw, uint phy_type, int bandtype, bool cck_only, uint rate_mask, bool mcsallow, u8 bw, u8 txstreams) argument
/linux-master/drivers/media/tuners/
H A Dr820t.c92 u32 bw; /* in MHz */ member in struct:r820t_priv
734 lna_top = 0xe5; /* detect bw 3, lna top:4, predet top:2 */
739 lna_top = 0xe5; /* detect bw 3, lna top:4, predet top:2 */
753 lna_top = 0xe5; /* detect bw 3, lna top:4, predet top:2 */
766 lna_top = 0xe5; /* detect bw 3, lna top:4, predet top:2 */
792 lna_top = 0xe5; /* detect bw 3, lna top:4, predet top:2 */
948 unsigned bw,
999 if (bw <= 6) {
1011 } else if (bw == 7) {
1091 ((delsys != priv->delsys) || bw !
947 r820t_set_tv_standard(struct r820t_priv *priv, unsigned bw, enum v4l2_tuner_type type, v4l2_std_id std, u32 delsys) argument
1305 generic_set_freq(struct dvb_frontend *fe, u32 freq , unsigned bw, enum v4l2_tuner_type type, v4l2_std_id std, u32 delsys) argument
2198 unsigned bw; local
2231 unsigned bw; local
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H A Dxc5000.c687 u32 bw = fe->dtv_property_cache.bandwidth_hz; local
721 priv->bandwidth = bw;
730 u32 bw = fe->dtv_property_cache.bandwidth_hz; local
755 /* All ISDB-T are currently for 6 MHz bw */
756 if (!bw)
757 bw = 6000000;
764 switch (bw) {
787 if (bw <= 6000000) {
791 } else if (bw <= 7000000) {
801 b, bw);
1076 xc5000_get_bandwidth(struct dvb_frontend *fe, u32 *bw) argument
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/linux-master/drivers/net/ethernet/ti/
H A Dcpsw_priv.c822 static int cpsw_set_fifo_bw(struct cpsw_priv *priv, int fifo, int bw) argument
829 if (bw > priv->shp_cfg_speed * 1000)
833 * and fifo bw no more then interface can allow
838 if (!bw) {
854 val = DIV_ROUND_UP(bw, priv->shp_cfg_speed * 10);
871 priv->fifo_bw[fifo] = bw;
873 dev_warn(priv->dev, "set FIFO%d bw = %d\n", fifo,
882 static int cpsw_set_fifo_rlimit(struct cpsw_priv *priv, int fifo, int bw) argument
889 ret = cpsw_set_fifo_bw(priv, fifo, bw);
897 if (!bw)
940 u32 bw = 0; local
1069 int fifo, bw; local
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/linux-master/drivers/net/wireless/intel/iwlwifi/mvm/
H A Dftm-responder.c27 u8 *bw, u8 *ctrl_ch_position)
31 *bw = IWL_TOF_BW_20_LEGACY;
34 *bw = IWL_TOF_BW_20_HT;
37 *bw = IWL_TOF_BW_40;
41 *bw = IWL_TOF_BW_80;
26 iwl_mvm_ftm_responder_set_bw_v1(struct cfg80211_chan_def *chandef, u8 *bw, u8 *ctrl_ch_position) argument
/linux-master/drivers/gpu/drm/msm/disp/dpu1/
H A Ddpu_core_perf.c146 u32 bw, threshold; local
179 DRM_DEBUG_ATOMIC("crtc:%d bw:%llu ctrl:%d\n",
187 bw = DIV_ROUND_UP_ULL(bw_sum_of_intfs, 1000);
188 DRM_DEBUG_ATOMIC("calculated bandwidth=%uk\n", bw);
192 DRM_DEBUG_ATOMIC("final threshold bw limit = %d\n", threshold);
197 } else if (bw > threshold) {
198 DPU_ERROR("exceeds bandwidth: %ukb > %ukb\n", bw,
232 DRM_DEBUG_ATOMIC("crtc=%d bw=%llu paths:%d\n",
369 DPU_ERROR("crtc-%d: failed to update bus bw vote\n",
/linux-master/drivers/media/dvb-frontends/
H A Dcx24113.c471 u32 bw; local
473 bw = ((c->symbol_rate/100) * roll_off) / 1000;
474 bw += (10000000/100) + 5;
475 bw /= 10;
476 bw += 1000;
477 cx24113_set_bandwidth(state, bw);
481 return cx24113_get_status(fe, &bw);
H A Dstv0900_sw.c583 intp->bw[d] = stv0900_carrier_width(intp->symbol_rate[d],
597 intp->bw[d], demod);
599 stv0900_set_tuner(fe, tuner_freq, intp->bw[d]);
964 intp->bw[demod] = stv0900_carrier_width(srate,
972 intp->bw[demod],
976 intp->bw[demod]);
1490 intp->bw[demod], demod);
1493 intp->bw[demod]);
1837 intp->bw[demod] = 2 * 36000000;
1854 intp->bw[demo
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H A Ddvb-pll.c89 u32 bw = fe->dtv_property_cache.bandwidth_hz; local
90 if (bw == 7000000)
113 u32 bw = fe->dtv_property_cache.bandwidth_hz; local
114 if (bw == 8000000)
207 u32 bw = fe->dtv_property_cache.bandwidth_hz; local
208 if (bw == 8000000)
241 u32 bw = fe->dtv_property_cache.bandwidth_hz; local
242 if (bw == 7000000)
265 u32 bw = fe->dtv_property_cache.bandwidth_hz; local
266 if (bw
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn20/
H A Ddcn20_clk_mgr.c117 dppclk_khz = context->res_ctx.pipe_ctx[i].plane_res.bw.dppclk_khz;
221 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
349 struct dc_clocks *new_clocks = &context->bw_ctx.bw.dcn.clk;
456 clock_cfg->max_clock_khz = context->bw_ctx.bw.dcn.clk.max_supported_dispclk_khz;
459 clock_cfg->bw_requirequired_clock_khz = context->bw_ctx.bw.dcn.clk.bw_dispclk_khz;
462 clock_cfg->max_clock_khz = context->bw_ctx.bw.dcn.clk.max_supported_dppclk_khz;
465 clock_cfg->bw_requirequired_clock_khz = context->bw_ctx.bw.dcn.clk.bw_dppclk_khz;
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_dp_tunnel.c62 int bw; local
64 bw = intel_dp_max_link_data_rate(intel_dp, rate, lane_count);
65 *below_dprx_bw = bw < drm_dp_max_dprx_data_rate(rate, lane_count);
67 return bw;
101 /* Suppress the notification if the mode list can't change due to bw. */
737 int bw; local
747 bw = drm_dp_tunnel_atomic_get_required_bw(tunnel_state);
749 if (drm_dp_tunnel_alloc_bw(tunnel, bw) != 0)
/linux-master/drivers/net/wireless/mediatek/mt76/mt7925/
H A Dmac.c45 u8 bw; local
105 switch (rate->bw) {
107 bw = IEEE80211_STA_RX_BW_160;
110 bw = IEEE80211_STA_RX_BW_80;
113 bw = IEEE80211_STA_RX_BW_40;
116 bw = IEEE80211_STA_RX_BW_20;
127 u8 offs = MT_WTBL_TXRX_RATE_G2_HE + 2 * bw;
132 if (val & BIT(MT_WTBL_TXRX_RATE_G2 + bw))
252 u8 stbc, gi, bw, dcm, nss; local
267 bw
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/linux-master/drivers/net/wireless/mediatek/mt76/mt7603/
H A Dmac.c660 status->bw = RATE_INFO_BW_40;
691 const struct ieee80211_tx_rate *rate, bool stbc, u8 *bw)
696 *bw = 0;
704 *bw = 1;
739 u8 bw, bw_prev, bw_idx = 0; local
792 val[0] = mt7603_mac_tx_rate_val(dev, &rates[0], stbc, &bw);
793 bw_prev = bw;
796 probe_val = mt7603_mac_tx_rate_val(dev, probe_rate, stbc, &bw);
797 if (bw)
805 w9 |= FIELD_PREP(MT_WTBL2_W9_CC_BW_SEL, bw);
690 mt7603_mac_tx_rate_val(struct mt7603_dev *dev, const struct ieee80211_tx_rate *rate, bool stbc, u8 *bw) argument
938 u8 bw; local
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/linux-master/drivers/thunderbolt/
H A Dusb4.c2061 usb4_usb3_port_max_bandwidth(const struct tb_port *port, unsigned int bw) argument
2065 return min(bw, port->max_bw);
2066 return bw;
2139 static unsigned int usb3_bw_to_mbps(u32 bw, u8 scale) argument
2143 uframes = bw * 512UL << scale;
2160 u32 val, bw, scale; local
2175 bw = val & ADP_USB3_CS_2_AUBW_MASK;
2176 *upstream_bw = usb3_bw_to_mbps(bw, scale);
2178 bw = (val & ADP_USB3_CS_2_ADBW_MASK) >> ADP_USB3_CS_2_ADBW_SHIFT;
2179 *downstream_bw = usb3_bw_to_mbps(bw, scal
2214 u32 val, bw, scale; local
2757 usb4_dp_port_set_estimated_bandwidth(struct tb_port *port, int bw) argument
2886 usb4_dp_port_allocate_bandwidth(struct tb_port *port, int bw) argument
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/linux-master/drivers/net/wireless/mediatek/mt76/mt7615/
H A Dmac.c559 status->bw = RATE_INFO_BW_40;
562 status->bw = RATE_INFO_BW_80;
565 status->bw = RATE_INFO_BW_160;
663 bool stbc, u8 *bw)
668 *bw = 0;
675 *bw = 1;
677 *bw = 2;
679 *bw = 3;
687 *bw = 1;
808 u8 bw; local
660 mt7615_mac_tx_rate_val(struct mt7615_dev *dev, struct mt76_phy *mphy, const struct ieee80211_tx_rate *rate, bool stbc, u8 *bw) argument
975 u8 bw, bw_prev; local
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/linux-master/drivers/net/wireless/ath/carl9170/
H A Dphy.c967 u32 freq, enum carl9170_bw bw)
975 switch (bw) {
1036 enum carl9170_bw bw)
1052 return &carl9170_phy_freq_params[chanidx].params[bw];
1260 enum carl9170_bw bw, struct ar9170_calctl_edges edges[])
1271 if (bw == CARL9170_BW_40_BELOW || bw == CARL9170_BW_40_ABOVE)
1291 static void carl9170_calc_ctl(struct ar9170 *ar, u32 freq, enum carl9170_bw bw) argument
1366 freq, bw, EDGES(ctl_idx, 1));
1372 if (bw
966 carl9170_init_rf_bank4_pwr(struct ar9170 *ar, bool band5ghz, u32 freq, enum carl9170_bw bw) argument
1035 carl9170_get_hw_dyn_params(struct ieee80211_channel *channel, enum carl9170_bw bw) argument
1259 carl9170_get_heavy_clip(struct ar9170 *ar, u32 freq, enum carl9170_bw bw, struct ar9170_calctl_edges edges[]) argument
1428 carl9170_set_power_cal(struct ar9170 *ar, u32 freq, enum carl9170_bw bw) argument
1578 enum carl9170_bw bw; local
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/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Ddp.c324 OUTP_DBG(outp, "training %dx%02x", ior->dp.nr, ior->dp.bw);
327 sink[0] = (outp->dp.rate[rate].dpcd < 0) ? ior->dp.bw : 0;
378 OUTP_DBG(outp, "programming link for %dx%02x", ior->dp.nr, ior->dp.bw);
388 while (ior->dp.bw < nvbios_rd08(bios, lnkcmp))
402 while ((ior->dp.bw * 2700) < nvbios_rd16(bios, lnkcmp))
406 while (ior->dp.bw < nvbios_rd08(bios, lnkcmp))
493 if (outp->dp.rate[rate].rate == (retrain ? ior->dp.bw : outp->dp.lt.bw) * 27000)
513 ior->dp.bw = outp->dp.lt.bw;
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/linux-master/drivers/net/wireless/mediatek/mt76/mt7996/
H A Ddebugfs.c240 const char *bw; local
257 bw = "40";
260 bw = "80";
263 bw = "160";
266 bw = "80P80";
269 bw = "20";
275 bw, chandef->center_freq1);
478 static const char * const bw[] = { local
500 bw[mib->tx_bf_rx_fb_bw],
915 * bw
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn10/
H A Ddcn10_hw_sequencer_debug.c476 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_khz,
477 dc->current_state->bw_ctx.bw.dcn.clk.dcfclk_deep_sleep_khz,
478 dc->current_state->bw_ctx.bw.dcn.clk.dispclk_khz,
479 dc->current_state->bw_ctx.bw.dcn.clk.dppclk_khz,
480 dc->current_state->bw_ctx.bw.dcn.clk.fclk_khz,
481 dc->current_state->bw_ctx.bw.dcn.clk.socclk_khz);
/linux-master/arch/x86/kernel/cpu/resctrl/
H A Dctrlmondata.c34 unsigned long bw; local
45 ret = kstrtoul(buf, 10, &bw);
51 if ((bw < r->membw.min_bw || bw > r->default_ctrl) &&
53 rdt_last_cmd_printf("MB value %ld out of range [%d,%d]\n", bw,
58 *data = roundup(bw, (unsigned long)r->membw.bw_gran);

Completed in 519 milliseconds

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