Searched refs:membase (Results 51 - 75 of 208) sorted by relevance

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/linux-master/arch/mips/ralink/
H A Dtimer.c36 void __iomem *membase; member in struct:rt_timer
44 __raw_writel(val, rt->membase + reg);
49 return __raw_readl(rt->membase + reg);
116 rt->membase = devm_platform_get_and_ioremap_resource(pdev, 0, NULL);
117 if (IS_ERR(rt->membase))
118 return PTR_ERR(rt->membase);
/linux-master/drivers/clk/stm32/
H A Dreset-stm32.c20 void __iomem *membase; member in struct:stm32_reset_data
66 addr = data->membase + ptr_line->offset;
78 reg = readl(data->membase + ptr_line->offset);
85 writel(reg, data->membase + ptr_line->offset);
117 reg = readl(data->membase + ptr_line->offset);
139 reset_data->membase = base;
/linux-master/drivers/reset/
H A Dreset-socfpga.c44 data->membase = ioremap(res.start, size);
45 if (!data->membase) {
52 data->membase += reg_offset;
H A Dreset-sunxi.c44 data->membase = ioremap(res.start, size);
45 if (!data->membase) {
/linux-master/drivers/i2c/busses/
H A Di2c-uniphier.c41 void __iomem *membase; member in struct:uniphier_i2c_priv
71 writel(txdata, priv->membase + UNIPHIER_I2C_DTRM);
77 rxdata = readl(priv->membase + UNIPHIER_I2C_DREC);
196 if (!(readl(priv->membase + UNIPHIER_I2C_DREC) &
251 writel(val, priv->membase + UNIPHIER_I2C_BRST);
258 return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) &
267 priv->membase + UNIPHIER_I2C_BRST);
274 return !!(readl(priv->membase + UNIPHIER_I2C_BSTS) &
303 writel((cyc * 5 / 9 << 16) | cyc, priv->membase + UNIPHIER_I2C_CLK);
320 priv->membase
[all...]
/linux-master/arch/mips/rb532/
H A Dserial.c44 .membase = (char *)KSEG1ADDR(REGBASE + UART0BASE),
/linux-master/drivers/tty/serial/8250/
H A D8250_rt288x.c42 return __raw_readl(p->membase + (offset << p->regshift));
51 __raw_writel(value, p->membase + (offset << p->regshift));
57 return __raw_readl(up->port.membase + RT288X_DL);
62 __raw_writel(value, up->port.membase + RT288X_DL);
H A D8250_pcilib.c28 port->port.membase = pcim_iomap_table(dev)[bar] + offset;
34 port->port.membase = NULL;
H A D8250_em.c41 writeb(value, p->membase);
46 writel(value, p->membase + ((offset + 1) << 2));
49 writel(value, p->membase + (UART_FCR_EM_HW << 2));
57 writel(value, p->membase + (offset << 2));
66 return readb(p->membase);
72 return readl(p->membase + ((offset + 1) << 2));
74 return readl(p->membase + (UART_FCR_EM_HW << 2));
80 return readl(p->membase + (offset << 2));
H A D8250_parisc.c58 uart.port.membase = ioremap(address, 16);
59 if (!uart.port.membase) {
72 iounmap(uart.port.membase);
/linux-master/drivers/bus/
H A Dhisi_lpc.c38 void __iomem *membase; member in struct:hisi_lpc_dev
123 writel_relaxed(opcnt, lpcdev->membase + LPC_REG_OP_LEN);
124 writel_relaxed(cmd_word, lpcdev->membase + LPC_REG_CMD);
125 writel_relaxed(addr, lpcdev->membase + LPC_REG_ADDR);
128 lpcdev->membase + LPC_REG_STARTUP_SIGNAL);
131 ret = wait_lpc_idle(lpcdev->membase, waitcnt);
137 readsb(lpcdev->membase + LPC_REG_RDATA, buf, opcnt);
176 writel_relaxed(opcnt, lpcdev->membase + LPC_REG_OP_LEN);
177 writel_relaxed(cmd_word, lpcdev->membase + LPC_REG_CMD);
178 writel_relaxed(addr, lpcdev->membase
[all...]
H A Duniphier-system-bus.c34 void __iomem *membase; member in struct:uniphier_system_bus_priv
118 void __iomem *base_reg = priv->membase + UNIPHIER_SBC_BASE;
136 void __iomem *base_reg = priv->membase + UNIPHIER_SBC_BASE;
187 priv->membase = devm_platform_ioremap_resource(pdev, 0);
188 if (IS_ERR(priv->membase))
189 return PTR_ERR(priv->membase);
/linux-master/drivers/tty/serial/
H A Dpch_uart.c208 void __iomem *membase; member in struct:eg20t_port
312 "IER: \t0x%02x\n", ioread8(priv->membase + UART_IER));
314 "IIR: \t0x%02x\n", ioread8(priv->membase + UART_IIR));
316 "LCR: \t0x%02x\n", ioread8(priv->membase + UART_LCR));
318 "MCR: \t0x%02x\n", ioread8(priv->membase + UART_MCR));
320 "LSR: \t0x%02x\n", ioread8(priv->membase + UART_LSR));
322 "MSR: \t0x%02x\n", ioread8(priv->membase + UART_MSR));
325 ioread8(priv->membase + PCH_UART_BRCSR));
327 lcr = ioread8(priv->membase + UART_LCR);
328 iowrite8(PCH_UART_LCR_DLAB, priv->membase
1370 void __iomem *membase; local
[all...]
H A Dfsl_lpuart.c386 return readl(port->membase + off);
388 return ioread32be(port->membase + off);
399 writel(val, port->membase + off);
402 iowrite32be(val, port->membase + off);
444 temp = readb(port->membase + UARTCR2);
446 writeb(temp, port->membase + UARTCR2);
462 temp = readb(port->membase + UARTCR2);
463 writeb(temp & ~UARTCR2_RE, port->membase + UARTCR2);
623 val = readb(sport->port.membase + UARTCFIFO);
625 writeb(val, sport->port.membase
[all...]
/linux-master/arch/mips/loongson2ef/common/
H A Dserial.c36 .membase = (void __iomem *)NULL, \
67 uart8250_data[mips_machtype].membase =
/linux-master/drivers/tty/serial/jsm/
H A Djsm_driver.c137 brd->membase = pci_resource_start(pdev, 4);
140 if (brd->membase & 0x1)
141 brd->membase &= ~0x3;
143 brd->membase &= ~0xF;
155 brd->re_map_membase = ioremap(brd->membase,
189 brd->membase = pci_resource_start(pdev, 0);
192 if (brd->membase & 1)
193 brd->membase &= ~0x3;
195 brd->membase &= ~0xF;
203 brd->re_map_membase = ioremap(brd->membase,
[all...]
/linux-master/drivers/dma/
H A Dtimb_dma.c72 void __iomem *membase; member in struct:timb_dma_chan
89 void __iomem *membase; member in struct:timb_dma
118 ier = ioread32(td->membase + TIMBDMA_IER);
122 iowrite32(ier, td->membase + TIMBDMA_IER);
136 isr = ioread32(td->membase + TIMBDMA_ISR) & (1 << id);
138 iowrite32(isr, td->membase + TIMBDMA_ISR);
192 "td_chan: %p, chan: %d, membase: %p\n",
193 td_chan, td_chan->chan.chan_id, td_chan->membase);
198 iowrite32(0, td_chan->membase + TIMBDMA_OFFS_RX_DHAR);
199 iowrite32(td_desc->txd.phys, td_chan->membase
[all...]
/linux-master/drivers/clk/sunxi/
H A Dclk-sun9i-mmc.c27 void __iomem *membase; member in struct:sun9i_mmc_clk_data
41 void __iomem *reg = data->membase + SUN9I_MMC_WIDTH * id;
63 void __iomem *reg = data->membase + SUN9I_MMC_WIDTH * id;
110 data->membase = devm_platform_get_and_ioremap_resource(pdev, 0, &r);
111 if (IS_ERR(data->membase))
112 return PTR_ERR(data->membase);
149 data->membase + SUN9I_MMC_WIDTH * i,
/linux-master/drivers/misc/ibmasm/
H A Duart.c41 uart.port.membase = iomem_base;
/linux-master/arch/arm/mach-omap1/
H A Dserial.c37 return (unsigned int)__raw_readb(up->membase + offset);
44 __raw_writeb(value, p->membase + offset);
119 serial_platform_data[i].membase =
121 if (!serial_platform_data[i].membase) {
/linux-master/drivers/pinctrl/
H A Dpinctrl-equilibrium.c33 writel(BIT(offset), gctrl->membase + GPIO_IRNENCLR);
48 writel(BIT(offset), gctrl->membase + GPIO_IRNRNSET);
60 writel(BIT(offset), gctrl->membase + GPIO_IRNCR);
86 eqbr_cfg_bit(gctrl->membase + GPIO_IRNCFG, offset, type->trig_type);
87 eqbr_cfg_bit(gctrl->membase + GPIO_EXINTCR1, offset, type->trig_type);
88 eqbr_cfg_bit(gctrl->membase + GPIO_EXINTCR0, offset, type->logic_type);
158 pins = readl(gctrl->membase + GPIO_IRNCR);
228 gctrl->membase = devm_ioremap_resource(dev, &res);
229 if (IS_ERR(gctrl->membase))
230 return PTR_ERR(gctrl->membase);
[all...]
/linux-master/arch/mips/bcm47xx/
H A Dserial.c42 p->membase = (void *)ssb_port->regs;
68 p->membase = (void *)bcma_port->regs;
/linux-master/drivers/dma/sf-pdma/
H A Dsf-pdma.h57 #define SF_PDMA_REG_BASE(ch) (pdma->membase + (PDMA_CHAN_OFFSET * (ch)))
114 void __iomem *membase; member in struct:sf_pdma
/linux-master/drivers/watchdog/
H A Dlantiq_wdt.c64 void __iomem *membase; member in struct:ltq_wdt_priv
70 return __raw_readl(priv->membase + offset);
75 __raw_writel(val, priv->membase + offset);
214 priv->membase = devm_platform_ioremap_resource(pdev, 0);
215 if (IS_ERR(priv->membase))
216 return PTR_ERR(priv->membase);
/linux-master/drivers/spi/
H A Dspi-sh-sci.c27 void __iomem *membase; member in struct:sh_sci_spi
33 #define SCSPTR(sp) (sp->membase + 0x1c)
154 sp->membase = ioremap(r->start, resource_size(r));
155 if (!sp->membase) {
167 iounmap(sp->membase);
180 iounmap(sp->membase);

Completed in 375 milliseconds

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