Searched refs:instruction (Results 51 - 75 of 123) sorted by relevance

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/linux-master/arch/xtensa/kernel/
H A Dalign.S169 /* Analyze the instruction (load or store?). */
231 /* Analyze the instruction (load or store?). */
377 # a7: instruction pointer, a4: instruction, a3: value
382 addi a7, a7, 2 # incr. PC,assume 16-bit instruction
388 addi a7, a7, 1 # increment PC, 32-bit instruction
390 addi a7, a7, 3 # increment PC, 32-bit instruction
453 1: wsr a7, epc1 # skip emulated instruction
513 * address, and indeed, already fetched the instruction. That
523 /* Extract the instruction tha
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/linux-master/arch/arm/kernel/
H A Dentry-common.S205 USER( ldreq r10, [saved_pc, #-4] ) @ get SWI instruction
207 USER( ldr r10, [saved_pc, #-4] ) @ get SWI instruction
209 ARM_BE8(rev r10, r10) @ little endian instruction
224 USER( ldr scno, [saved_pc, #-4] ) @ get SWI instruction
278 * containing the swi instruction, but we're not really in a
280 * instruction and re-enter the user fault handling path trying
H A Dentry-armv.S11 * Note: there is a StrongARM bug in the STMIA rn, {regs}^ instruction
249 @ Correct the PC such that it is pointing at the instruction
250 @ which caused the fault. If the faulting instruction was ARM
251 @ the PC will be pointing at the next instruction, and have to
253 @ pointing at the second half of the Thumb instruction. We
264 @ If a kprobe is about to simulate a "stmdb sp..." instruction,
449 @ IRQs must be enabled before attempting to read the instruction from
/linux-master/tools/objtool/
H A Dorc_gen.c62 struct instruction *insn;
/linux-master/arch/m68k/fpsp040/
H A Dutil.S11 | g_opcls: returns the opclass of the float instruction.
94 | instruction is fsgldiv or fsglmul or fsadd, fdadd, fsub, fdsub, fsmul,
96 | If the instruction is fsgldiv of fsglmul, the rounding precision must be
97 | extended. If the instruction is not fsgldiv or fsglmul but a force-
98 | precision instruction, the rounding precision is then set to the force
118 bra ovf_fpcr |instruction is none of the above
124 beql ovff_sgl |the instruction is force single
126 beql ovff_dbl |the instruction is force double
301 | get_fline --- get f-line opcode of interrupted instruction
H A Dget_op.S8 | instruction exception handler ('unimp' - vector 11). 'get_op'
33 | and the instruction is then restored back into the '040. The
34 | '040 is then able to complete the instruction.
40 | then an frestore is done to restore the instruction back into
42 | a normalized number in the source and the instruction is
50 | norm. The instruction is then restored back into the '040
51 | which re_executes the instruction.
199 | If the instruction is fmovecr, exit get_op. It is handled
305 | instruction is dyadic or monadic is still unknown
H A Dsgetem.S39 | This entry point is used by the unimplemented instruction exception
65 | This entry point is used by the unimplemented instruction exception
/linux-master/arch/m68k/math-emu/
H A Dfp_util.S57 | illegal instruction
61 | completed instruction
1125 | s: size, as given in an assembly instruction.
1352 | emulated instruction.
1370 | emulated instruction.
H A Dfp_entry.S60 | emulate the instruction
112 | instruction decoding, otherwise the stack pointer is incorrect
/linux-master/arch/arm/lib/
H A Dbacktrace.S71 teq r3, r2, lsr #11 @ instruction
90 ldr r3, .Ldsi @ instruction exists,
/linux-master/arch/m68k/ifpsp060/
H A Diskeleton.S63 | the PC pointing to the instruction following the instruction
65 | To simply continue execution at the next instruction, just
85 | Instruction exception handler. If the instruction was a "chk2"
120 | Instruction exception handler isp_unimp(). If the instruction is a 64-bit
H A Dos.S107 | Reads from data/instruction memory while in supervisor mode.
174 | Read an instruction word from user memory.
180 | d0 - instruction word in d0
210 | Read an instruction longword from user memory.
216 | d0 - instruction longword in d0
353 | This is the exit point for the 060FPSP when an instruction is being traced
354 | and there are no other higher priority exceptions pending for this instruction
371 | The sample routine below simply executes an "rte" instruction which
/linux-master/drivers/scsi/
H A Dscript_asm.pl191 $address = 0; # Address of current instruction
268 # clause from a transfer control instruction (RETURN, CALL, JUMP, INT).
454 # Process MOVE length, address, WITH|WHEN phase instruction
489 printf STDERR "Move memory instruction = %08x,%08x,%08x\n",
584 # instruction.
696 $instruction = $1;
698 if ($instruction =~ /JUMP/i) {
700 } elsif ($instruction =~ /CALL/i) {
739 $instruction = $1;
741 print STDERR "Parsing $instruction\
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/linux-master/net/nfc/nci/
H A Dhci.c50 u8 header; /* type -cmd,evt,rsp- + instruction */
383 u8 type, u8 instruction, struct sk_buff *skb)
390 nci_hci_cmd_received(ndev, pipe, instruction, skb);
393 nci_hci_event_received(ndev, pipe, instruction, skb);
396 pr_err("UNKNOWN MSG Type %d, instruction=%d\n",
397 type, instruction);
411 u8 pipe, type, instruction; local
419 instruction = NCI_HCP_MSG_GET_CMD(message->header);
423 type, instruction, skb);
382 nci_hci_hcp_message_rx(struct nci_dev *ndev, u8 pipe, u8 type, u8 instruction, struct sk_buff *skb) argument
/linux-master/arch/arm/boot/compressed/
H A Defi-header.S18 @ This is a two-instruction NOP, which happens to bear the
/linux-master/arch/sh/include/asm/
H A Duaccess.h130 int handle_unaligned_access(insn_size_t instruction, struct pt_regs *regs,
/linux-master/scripts/
H A Ddecodecode241 echo Code starting with the faulting instruction > $T.aa
249 cat $T.oo | sed -e "${faultlinenum}s/^\([^:]*:\)\(.*\)/\1\*\2\t\t<-- trapping instruction/"
/linux-master/tools/testing/selftests/sgx/
H A Dtest_encl_bootstrap.S67 # Prepare EEXIT target by popping the address of the instruction after
/linux-master/tools/objtool/arch/loongarch/
H A Dorc.c10 int init_orc_entry(struct orc_entry *orc, struct cfi_state *cfi, struct instruction *insn)
20 * trigger unreachable instruction warnings), or
/linux-master/tools/objtool/arch/x86/
H A Dorc.c10 int init_orc_entry(struct orc_entry *orc, struct cfi_state *cfi, struct instruction *insn)
19 * trigger unreachable instruction warnings), or
/linux-master/arch/mips/kernel/
H A Dscall64-n32.S40 daddiu t1, 4 # skip to next instruction
H A Dscall64-n64.S43 daddiu t1, 4 # skip to next instruction
/linux-master/net/nfc/hci/
H A Dcore.c134 u8 instruction; local
141 instruction = HCP_MSG_GET_CMD(message->header);
144 nfc_hci_hcp_message_rx(hdev, pipe, type, instruction, skb);
858 u8 instruction; local
911 instruction = HCP_MSG_GET_CMD(packet->message.header);
914 nfc_hci_hcp_message_rx(hdev, pipe, type, instruction, hcp_skb);
/linux-master/arch/m68k/ifpsp060/src/
H A Dfpsp.S549 set fmovm_flg, 0x40 # flag bit: fmovm instruction
586 # _imem_read_long() - read instruction longword #
592 # fout() - emulate an opclass 3 instruction #
613 # instruction, the 060 will take an overflow exception whether the #
615 # This handler emulates the instruction to determine what the correct #
622 # the default result (only if the instruction is opclass 3). For #
630 # Also, in the case of an opclass three instruction where #
649 # the FPIAR holds the "current PC" of the faulting instruction
651 mov.l EXC_EXTWPTR(%a6),%a0 # fetch instruction addr
652 addq.l &0x4,EXC_EXTWPTR(%a6) # incr instruction pt
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/linux-master/arch/powerpc/kernel/
H A Dmodule_64.c106 * 28 byte jump instruction sequence (7 instructions) that can
576 * value maximum span in an instruction which uses a signed offset). Round down
724 /* We expect a noop next: if it is, replace it with instruction to
726 static int restore_r2(const char *name, u32 *instruction, struct module *me) argument
728 u32 *prev_insn = instruction - 1;
729 u32 insn_val = *instruction;
746 * For livepatch, the restore r2 instruction might have already been
749 * the warning and the instruction write.
756 me->name, insn_val, instruction);
761 return patch_instruction(instruction, ppc_ins
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