| /linux-master/arch/arm64/kvm/hyp/ |
| H A D | entry.S | 116 ALTERNATIVE(nop, SET_PSTATE_PAN(1), ARM64_HAS_PAN, CONFIG_ARM64_PAN)
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| /linux-master/arch/riscv/include/asm/ |
| H A D | alternative-macros.h | 140 * ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k)
142 * asm(ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k));
151 #define ALTERNATIVE(old_content, new_content, vendor_id, patch_id, CONFIG_k) \ macro
156 * ALTERNATIVE() to patch its customized content at the same location. In
158 * on the following sample code and then replace ALTERNATIVE() with
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| /linux-master/arch/x86/lib/ |
| H A D | getuser.S | 38 #define ASM_BARRIER_NOSPEC ALTERNATIVE "", "lfence", X86_FEATURE_LFENCE_RDTSC
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| H A D | memcpy_64.S | 34 ALTERNATIVE "jmp memcpy_orig", "", X86_FEATURE_FSRM
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| /linux-master/arch/arm64/kernel/pi/ |
| H A D | patch-scs.c | 86 asm(ALTERNATIVE("dc cvau, %0", "nop", ARM64_HAS_CACHE_IDC)
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| /linux-master/arch/loongarch/lib/ |
| H A D | memset.S | 26 ALTERNATIVE "b __memset_generic", \
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| H A D | memmove.S | 32 ALTERNATIVE "b __rmemcpy_generic", \
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| H A D | clear_user.S | 19 ALTERNATIVE "b __clear_user_generic", \
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| H A D | memcpy.S | 20 ALTERNATIVE "b __memcpy_generic", \
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| H A D | copy_user.S | 19 ALTERNATIVE "b __copy_user_generic", \
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| /linux-master/arch/arm64/kvm/hyp/nvhe/ |
| H A D | tlb.c | 115 asm(ALTERNATIVE("isb", "nop", ARM64_WORKAROUND_SPECULATIVE_AT));
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| /linux-master/arch/arm64/include/asm/ |
| H A D | percpu.h | 17 asm volatile(ALTERNATIVE("msr tpidr_el1, %0",
40 asm(ALTERNATIVE("mrs %0, tpidr_el1",
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| H A D | uaccess.h | 127 asm(ALTERNATIVE("nop", SET_PSTATE_PAN(0), ARM64_HAS_PAN,
133 asm(ALTERNATIVE("nop", SET_PSTATE_PAN(1), ARM64_HAS_PAN,
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| H A D | kvm_mmu.h | 322 asm(ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_SPECULATIVE_AT));
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| /linux-master/tools/arch/x86/lib/ |
| H A D | memcpy_64.S | 33 ALTERNATIVE "jmp memcpy_orig", "", X86_FEATURE_FSRM
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| /linux-master/arch/riscv/lib/ |
| H A D | uaccess.S | 17 ALTERNATIVE("j fallback_scalar_usercopy", "nop", 0, RISCV_ISA_EXT_v, CONFIG_RISCV_ISA_V)
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| /linux-master/arch/arm64/mm/ |
| H A D | context.c | 344 asm(ALTERNATIVE("nop; nop; nop",
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| /linux-master/arch/x86/kvm/vmx/ |
| H A D | vmenter.S | 111 ALTERNATIVE "jmp .Lspec_ctrl_done", "", X86_FEATURE_MSR_SPEC_CTRL
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| /linux-master/arch/x86/include/asm/ |
| H A D | percpu.h | 292 asm qual (ALTERNATIVE("call this_cpu_cmpxchg8b_emu", \
322 asm qual (ALTERNATIVE("call this_cpu_cmpxchg8b_emu", \
361 asm qual (ALTERNATIVE("call this_cpu_cmpxchg16b_emu", \
391 asm qual (ALTERNATIVE("call this_cpu_cmpxchg16b_emu", \
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| H A D | paravirt_types.h | 383 * ALTERNATIVE() macro with the indirect call as the initial code sequence,
397 asm volatile(ALTERNATIVE(PARAVIRT_CALL, ALT_CALL_INSTR, \
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| /linux-master/arch/x86/kernel/fpu/ |
| H A D | xstate.h | 111 * The 661 label is defined in the ALTERNATIVE* macros as the address of the
133 asm volatile(ALTERNATIVE(XRSTOR, \
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| /linux-master/arch/arm64/kvm/hyp/vhe/ |
| H A D | switch.c | 161 asm(ALTERNATIVE("nop", "isb", ARM64_WORKAROUND_SPECULATIVE_AT));
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| /linux-master/include/linux/ |
| H A D | arm-smccc.h | 408 #define SMCCC_SVE_CHECK ALTERNATIVE("nop \n", "bl __arm_smccc_sve_check \n", \
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| /linux-master/tools/arch/arm64/include/asm/ |
| H A D | sysreg.h | 824 asm(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412)); \
826 asm(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412)); \
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| /linux-master/arch/arm64/kvm/hyp/include/hyp/ |
| H A D | switch.h | 686 asm(ALTERNATIVE("nop", "dmb sy", ARM64_WORKAROUND_1508412));
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