Searched refs:u32 (Results 401 - 425 of 22518) sorted by relevance

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/linux-master/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dkv_dpm.h43 u32 num_entries;
48 u32 sclk_frequency;
54 u32 num_max_dpm_entries;
71 u32 offset;
72 u32 mask;
73 u32 shift;
74 u32 value;
79 u32 block_id;
80 u32 signal_id;
81 u32
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/linux-master/sound/mips/
H A Dhal2.h189 u32 _unused0[4];
190 u32 isr; /* 0x10 Status Register */
191 u32 _unused1[3];
192 u32 rev; /* 0x20 Revision Register */
193 u32 _unused2[3];
194 u32 iar; /* 0x30 Indirect Address Register */
195 u32 _unused3[3];
196 u32 idr0; /* 0x40 Indirect Data Register 0 */
197 u32 _unused4[3];
198 u32 idr
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/linux-master/security/selinux/include/
H A Davc.h49 u32 ssid;
50 u32 tsid;
52 u32 requested;
53 u32 audited;
54 u32 denied;
64 static inline u32 avc_audit_required(u32 requested, struct av_decision *avd,
65 int result, u32 auditdeny, u32 *deniedp)
67 u32 denie
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/linux-master/drivers/crypto/intel/qat/qat_common/
H A Dadf_gen2_hw_csr_data.c6 static u64 build_csr_ring_base_addr(dma_addr_t addr, u32 size)
11 static u32 read_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring)
16 static void write_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring,
17 u32 value)
22 static u32 read_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 rin
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H A Dicp_qat_fw_loader_handle.h30 u32 lm_size;
31 u32 icp_rst_csr;
32 u32 icp_rst_mask;
33 u32 glb_clk_enable_csr;
34 u32 misc_ctl_csr;
35 u32 wakeup_event_val;
39 u32 fcu_ctl_csr;
40 u32 fcu_sts_csr;
41 u32 fcu_dram_addr_hi;
42 u32 fcu_dram_addr_l
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/linux-master/drivers/net/wireless/ath/ath11k/
H A Dwmi.h43 u32 cmd_id;
47 u32 header;
2233 u32 pdev_id;
2234 u32 start_freq;
2235 u32 end_freq;
2239 u32 numss_m1;
2240 u32 ru_bit_mask;
2241 u32 ppet16_ppet8_ru3_ru0[PSOC_HOST_MAX_NUM_SS];
2245 u32 default_conc_scan_config_bits;
2246 u32 default_fw_config_bit
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/linux-master/drivers/usb/gadget/udc/
H A Dmv_u3d.h122 u32 rsvd[5];
123 u32 dboff; /* doorbell register offset */
124 u32 rtsoff; /* runtime register offset */
125 u32 vuoff; /* vendor unique register offset */
130 u32 usbcmd; /* Command register */
131 u32 rsvd1[11];
132 u32 dcbaapl; /* Device Context Base Address low register */
133 u32 dcbaaph; /* Device Context Base Address high register */
134 u32 rsvd2[243];
135 u32 ports
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/linux-master/drivers/crypto/starfive/
H A Djh7110-cryp.h35 u32 v;
37 u32 cmode :1;
41 u32 keymode :2;
43 u32 busy :1;
44 u32 done :1;
46 u32 krdy :1;
47 u32 aesrst :1;
48 u32 ie :1;
50 u32 ccm_start :1;
56 u32 mod
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/linux-master/include/video/
H A Dsticore.h61 u32 offset : 14; /* offset in 4kbyte page */
62 u32 sys_only : 1; /* don't map to user space */
63 u32 cache : 1; /* map to data cache */
64 u32 btlb : 1; /* map to block tlb */
65 u32 last : 1; /* last region in list */
66 u32 length : 14; /* length in 4kbyte page */
69 u32 region; /* complete region value */
80 u32 *sti_mem_addr; /* pointer to global sti memory (size=sti_mem_request) */
81 u32 *future_ptr; /* pointer to future data */
92 u32 *region_ptr
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/linux-master/arch/s390/kernel/
H A Dcompat_ptrace.h23 u32 gprs[NUM_GPRS];
24 u32 acrs[NUM_ACRS];
25 u32 orig_gpr2;
34 u32 ieee_instruction_pointer; /* obsolete, always 0 */
42 u32 u_tsize; /* Text segment size (pages). */
43 u32 u_dsize; /* Data segment size (pages). */
44 u32 u_ssize; /* Stack segment size (pages). */
45 u32 start_code; /* Starting virtual address of text. */
46 u32 start_stack; /* Starting virtual address of stack area.
51 u32 u_ar
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/linux-master/sound/soc/sprd/
H A Dsprd-pcm-dma.h13 u32 datawidth[SPRD_PCM_CHANNEL_MAX];
14 u32 fragment_len[SPRD_PCM_CHANNEL_MAX];
26 u32 direction;
27 u32 rate;
28 u32 sample_rate;
29 u32 channels;
30 u32 format;
31 u32 period;
32 u32 periods;
33 u32 info_phy
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/linux-master/drivers/gpu/drm/hyperv/
H A Dhyperv_drm.h18 u32 screen_width_max;
19 u32 screen_height_max;
20 u32 preferred_width;
21 u32 preferred_height;
22 u32 screen_depth;
30 u32 synthvid_version;
31 u32 mmio_megabytes;
47 int hyperv_update_situation(struct hv_device *hdev, u8 active, u32 bpp,
48 u32 w, u32
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/linux-master/drivers/crypto/ccp/
H A Dtee-dev.h31 u32 low_addr;
32 u32 hi_addr;
33 u32 size;
48 u32 ring_size;
50 u32 wptr;
100 u32 cmd_id;
101 u32 cmd_state;
102 u32 status;
103 u32 res0[1];
105 u32 res
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/linux-master/drivers/gpu/drm/xe/compat-i915-headers/
H A Dintel_pcode.h13 snb_pcode_write_timeout(struct intel_uncore *uncore, u32 mbox, u32 val,
21 snb_pcode_write(struct intel_uncore *uncore, u32 mbox, u32 val)
28 snb_pcode_read(struct intel_uncore *uncore, u32 mbox, u32 *val, u32 *val1)
34 skl_pcode_request(struct intel_uncore *uncore, u32 mbox,
35 u32 request, u32 reply_mas
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/linux-master/drivers/gpu/drm/imagination/
H A Dpvr_stream.h38 u32 offset;
40 u32 array_size;
41 u32 feature;
46 u32 stream_len;
47 u32 header_mask;
48 u32 quirk;
53 u32 ext_streams_num;
54 u32 valid_mask;
61 u32 main_stream_len;
63 u32 ext_nr_header
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/linux-master/include/linux/firmware/qcom/
H A Dqcom_scm.h20 u32 addr;
21 u32 val;
66 void qcom_scm_cpu_power_down(u32 flags);
67 int qcom_scm_set_remote_state(u32 state, u32 id);
75 int qcom_scm_pas_init_image(u32 peripheral, const void *metadata, size_t size,
78 int qcom_scm_pas_mem_setup(u32 peripheral, phys_addr_t addr, phys_addr_t size);
79 int qcom_scm_pas_auth_and_reset(u32 peripheral);
80 int qcom_scm_pas_shutdown(u32 peripheral);
81 bool qcom_scm_pas_supported(u32 periphera
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/linux-master/drivers/gpu/drm/xe/
H A Dxe_gsc_submit.h15 u32 xe_gsc_emit_header(struct xe_device *xe, struct iosys_map *map, u32 offset,
16 u8 heci_client_id, u64 host_session_id, u32 payload_size);
17 void xe_gsc_poison_header(struct xe_device *xe, struct iosys_map *map, u32 offset);
20 struct iosys_map *in, u32 offset_in,
21 struct iosys_map *out, u32 offset_out);
24 struct iosys_map *map, u32 offset,
25 u32 min_payload_size,
26 u32 *payload_offset);
28 int xe_gsc_pkt_submit_kernel(struct xe_gsc *gsc, u64 addr_in, u32 size_i
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H A Dxe_pcode.h16 int xe_pcode_init_min_freq_table(struct xe_gt *gt, u32 min_gt_freq,
17 u32 max_gt_freq);
18 int xe_pcode_read(struct xe_gt *gt, u32 mbox, u32 *val, u32 *val1);
19 int xe_pcode_write_timeout(struct xe_gt *gt, u32 mbox, u32 val,
24 int xe_pcode_request(struct xe_gt *gt, u32 mbox, u32 request,
25 u32 reply_mas
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H A Dxe_guc_fwif.h47 u32 flags;
48 u32 context_idx;
49 u32 engine_class;
50 u32 engine_submit_mask;
51 u32 wq_desc_lo;
52 u32 wq_desc_hi;
53 u32 wq_base_lo;
54 u32 wq_base_hi;
55 u32 wq_size;
56 u32 hwlrca_l
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/linux-master/drivers/media/common/siano/
H A Dsmsdvb.h64 u32 result;
65 u32 snr;
67 u32 ts_packets;
68 u32 ets_packets;
69 u32 constellation;
70 u32 hp_code;
71 u32 tps_srv_ind_lp;
72 u32 tps_srv_ind_hp;
73 u32 cell_id;
74 u32 reaso
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/linux-master/drivers/gpu/drm/arm/display/komeda/
H A Dkomeda_format_caps.h59 u32 hw_id;
60 u32 fourcc;
61 u32 supported_layer_types;
62 u32 supported_rots;
63 u32 supported_afbc_layouts;
77 u32 n_formats;
80 u32 layer_type, u64 modifier, u32 rot);
87 u32 fourcc, u64 modifier);
89 u32 komeda_get_afbc_format_bp
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/linux-master/drivers/media/platform/amphion/
H A Dvpu_windsor.h9 u32 vpu_windsor_get_data_size(void);
14 u32 regs_base, void __iomem *regs, u32 core_id);
16 int vpu_windsor_pack_cmd(struct vpu_rpc_event *pkt, u32 index, u32 id, void *data);
17 int vpu_windsor_convert_msg_id(u32 msg_id);
20 u32 instance, u32 type, u32 index,
23 u32 instanc
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/linux-master/arch/x86/include/asm/
H A Drealmode.h19 u32 text_start;
20 u32 ro_end;
22 u32 trampoline_start;
23 u32 trampoline_header;
25 u32 sev_es_trampoline_start;
28 u32 trampoline_start64;
29 u32 trampoline_pgd;
33 u32 wakeup_start;
34 u32 wakeup_header;
37 u32 machine_real_restart_as
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/linux-master/include/net/
H A Dfq.h35 u32 backlog;
53 u32 backlog_bytes;
54 u32 backlog_packets;
55 u32 overlimit;
56 u32 collisions;
57 u32 flows;
58 u32 tx_bytes;
59 u32 tx_packets;
74 u32 flows_cnt;
75 u32 limi
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/linux-master/drivers/platform/x86/intel/ifs/
H A Difs.h158 u32 chunk_size :16;
159 u32 num_chunks :8;
160 u32 rsvd1 :8;
161 u32 error_code :8;
162 u32 rsvd2 :11;
163 u32 max_core_limit :12;
164 u32 valid :1;
173 u32 error_code :8;
174 u32 chunks_in_stride :9;
175 u32 rsv
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