Searched refs:pin (Results 376 - 400 of 829) sorted by relevance

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/linux-master/virt/kvm/
H A Dirqchip.c40 int kvm_irq_map_chip_pin(struct kvm *kvm, unsigned irqchip, unsigned pin) argument
45 return irq_rt->chip[irqchip][pin];
152 rt->chip[e->irqchip.irqchip][e->irqchip.pin] = e->gsi;
/linux-master/drivers/pinctrl/
H A Dpinctrl-microchip-sgpio.c32 #define SGPIO_SRC_BITS 3 /* 3 bit wide field per pin */
135 static inline void sgpio_pin_to_addr(struct sgpio_priv *priv, int pin, argument
138 addr->port = pin / priv->bitcount;
139 addr->bit = pin % priv->bitcount;
355 unsigned int pin, unsigned long *config)
363 sgpio_pin_to_addr(priv, pin, &addr);
389 static int sgpio_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, argument
398 sgpio_pin_to_addr(priv, pin, &addr);
456 unsigned int pin, bool input)
581 int pin; local
354 sgpio_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config) argument
454 sgpio_gpio_set_direction(struct pinctrl_dev *pctldev, struct pinctrl_gpio_range *range, unsigned int pin, bool input) argument
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H A Dpinctrl-apple-gpio.c80 /* No locking needed to mask/unmask IRQs as the interrupt mode is per pin-register. */
82 unsigned int pin, u32 mask, u32 value)
84 regmap_update_bits(pctl->map, REG_GPIO(pin), mask, value);
88 unsigned int pin)
93 ret = regmap_read(pctl->map, REG_GPIO(pin), &val);
109 u32 pinfunc, pin, func; local
139 pin = APPLE_PIN(pinfunc);
147 group_name = pinctrl_generic_get_group_name(pctldev, pin);
81 apple_gpio_set_reg(struct apple_gpio_pinctrl *pctl, unsigned int pin, u32 mask, u32 value) argument
87 apple_gpio_get_reg(struct apple_gpio_pinctrl *pctl, unsigned int pin) argument
H A Dpinctrl-rk805.c54 * Different PMIC has different pin features, belowing 3 mask members are not
57 * pin that can be used as TS/GPIO, so fun_mask, dir_mask and val_mask are all
480 unsigned int pin, unsigned long *config)
489 arg = rk805_gpio_get(&pci->gpio_chip, pin);
502 unsigned int pin, unsigned long *configs,
515 rk805_gpio_set(&pci->gpio_chip, pin, arg);
516 rk805_pmx_gpio_set_direction(pctldev, NULL, pin, false);
520 rk805_pmx_gpio_set_direction(pctldev, NULL, pin, true);
611 /* Add pin range */
615 dev_err(&pdev->dev, "Couldn't add gpiochip pin rang
479 rk805_pinconf_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config) argument
501 rk805_pinconf_set(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *configs, unsigned int num_configs) argument
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H A Dpinctrl-as3722.c3 * ams AS3722 pin control and GPIO driver.
229 dev_dbg(as_pci->dev, "%s(): GPIO %u pin to function %u and val %u\n",
324 unsigned pin, unsigned long *config)
335 if (!(as_pci->gpio_control[pin].mode_prop & prop))
361 if (as_pci->gpio_control[pin].mode_prop & prop)
369 unsigned pin, unsigned long *configs,
379 mode_prop = as_pci->gpio_control[pin].mode_prop;
410 as_pci->gpio_control[pin].mode_prop = mode_prop;
573 dev_err(&pdev->dev, "Couldn't add pin range, %d\n", ret);
596 MODULE_DESCRIPTION("AS3722 pin contro
323 as3722_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin, unsigned long *config) argument
368 as3722_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin, unsigned long *configs, unsigned num_configs) argument
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/linux-master/sound/pci/hda/
H A Dhda_generic.h18 hda_nid_t pin; /* multi-io widget pin NID */ member in struct:hda_multi_io
20 unsigned int ctl_in; /* cached input-pin control value */
25 * For output, stored in the order of DAC -> ... -> pin,
26 * for input, pin -> ... -> ADC.
52 bool pin_fixed:1; /* path with fixed pin */
61 hda_nid_t pin; /* pin */ member in struct:automic_entry
63 unsigned int attr; /* pin attribute (INPUT_PIN_ATTR_*) */
188 /* for pin sensin
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H A Dhda_local.h214 int share_spdif; /* share SPDIF pin */
268 * Fix-up pin default configurations and add default verbs
361 /* helper macros to retrieve pin default-config values */
392 unsigned int snd_hda_get_default_vref(struct hda_codec *codec, hda_nid_t pin);
394 hda_nid_t pin, unsigned int val);
395 int _snd_hda_set_pin_ctl(struct hda_codec *codec, hda_nid_t pin,
399 * _snd_hda_set_pin_ctl - Set a pin-control value safely
401 * @pin: the pin NID to set the control
402 * @val: the pin
414 snd_hda_set_pin_ctl(struct hda_codec *codec, hda_nid_t pin, unsigned int val) argument
428 snd_hda_set_pin_ctl_cache(struct hda_codec *codec, hda_nid_t pin, unsigned int val) argument
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/linux-master/drivers/pinctrl/cirrus/
H A Dpinctrl-madera-core.c30 * Use pin GPIO names for consistency
77 * All single-pin functions can be mapped to any GPIO, however pinmux applies
78 * functions to pin groups and only those groups declared as supporting that
79 * function. To make this work we must put each pin in its own dummy group so
83 * as the pin to avoid confusion when comparing with datasheet instructions
94 /* set of pin numbers for single-pin groups, zero-indexed */
119 * alt-functions always apply to a single pin group, other functions always
450 /* Number of alt function groups plus number of single-pin groups */
477 /* return the dummy group for a single pin */
485 madera_pin_dbg_show_fn(struct madera_pin_private *priv, struct seq_file *s, unsigned int pin, unsigned int fn) argument
515 madera_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned int pin) argument
742 madera_pin_conf_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config) argument
821 madera_pin_conf_set(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *configs, unsigned int num_configs) argument
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/linux-master/drivers/pinctrl/bcm/
H A Dpinctrl-ns.c213 struct pinctrl_pin_desc *pin; local
244 for (i = 0, pin = (struct pinctrl_pin_desc *)&pctldesc->pins[0];
250 memcpy(pin++, src, sizeof(*src));
H A Dpinctrl-nsp-gpio.c76 static inline unsigned nsp_pin_to_gpio(unsigned pin) argument
78 return pin;
82 * nsp_set_bit - set or clear one bit (corresponding to the GPIO pin) in a
88 * @gpio: GPIO pin
112 * nsp_get_bit - get one bit (corresponding to the GPIO pin) in a
459 static int nsp_pin_config_get(struct pinctrl_dev *pctldev, unsigned pin, argument
469 gpio = nsp_pin_to_gpio(pin);
504 static int nsp_pin_config_set(struct pinctrl_dev *pctldev, unsigned pin, argument
513 gpio = nsp_pin_to_gpio(pin);
569 * pull up, pull down, slew and drive strength, when the pin i
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/linux-master/drivers/irqchip/
H A Dirq-mbigen.c25 /* The maximum IRQ pin number of mbigen chip(start from 0) */
69 unsigned int nid, pin; local
73 pin = hwirq % IRQS_PER_MBIGEN_NODE;
75 return pin * 4 + nid * MBIGEN_NODE_OFFSET
/linux-master/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_gem.c94 .pin = vmw_gem_object_pin,
129 .pin = false
154 .pin = false,
/linux-master/drivers/pinctrl/mediatek/
H A Dpinctrl-mt8135.c26 unsigned char pin; member in struct:mtk_spec_pull_set
38 .pin = _pin, \
234 unsigned int pin, bool isup, unsigned int r1r0)
243 if (pin == spec_pupd[i].pin) {
232 spec_pull_set(struct regmap *regmap, const struct mtk_pinctrl_devdata *devdata, unsigned int pin, bool isup, unsigned int r1r0) argument
H A Dpinctrl-mt2701.c20 * @pin: The pin number.
25 unsigned short pin; member in struct:mtk_spec_pinmux_set
32 .pin = _pin, \
454 static void mt2701_spec_pinmux_set(struct regmap *reg, unsigned int pin, argument
462 if (pin == mt2701_spec_pinmux[i].pin)
478 static void mt2701_spec_dir_set(unsigned int *reg_addr, unsigned int pin) argument
480 if (pin > 175)
/linux-master/drivers/gpu/drm/gma500/
H A Dintel_gmbus.c171 intel_gpio_create(struct drm_psb_private *dev_priv, u32 pin) argument
185 if (pin >= ARRAY_SIZE(map_pin_to_reg) || !map_pin_to_reg[pin])
192 gpio->reg = map_pin_to_reg[pin];
196 "gma500 GPIO%c", "?BACDE?F"[pin]);
349 DRM_INFO("GMBUS timed out, falling back to bit banging on pin %d [%s]\n",
/linux-master/drivers/gpio/
H A Dgpio-zynq.c93 /* Mid pin number of a bank */
142 * @bank_min: this array represents bank's min pin
143 * @bank_max: this array represents bank's max pin
180 * zynq_gpio_get_bank_pin - Get the bank number and pin number within that bank
181 * for a given pin in the GPIO device
182 * @pin_num: gpio pin number within the device
184 * pin
185 * @bank_pin_num: an output parameter used to return pin number within a bank
186 * for the given gpio pin
189 * Returns the bank number and pin offse
225 zynq_gpio_get_value(struct gpio_chip *chip, unsigned int pin) argument
268 zynq_gpio_set_value(struct gpio_chip *chip, unsigned int pin, int state) argument
305 zynq_gpio_dir_in(struct gpio_chip *chip, unsigned int pin) argument
344 zynq_gpio_dir_out(struct gpio_chip *chip, unsigned int pin, int state) argument
380 zynq_gpio_get_direction(struct gpio_chip *chip, unsigned int pin) argument
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/linux-master/drivers/pinctrl/ti/
H A Dpinctrl-ti-iodelay.c54 * @reg_nr_per_pin: Number of iodelay registers for each pin
125 * @cfg: configuration array for the pin (from dt)
143 * @pa: pinctrl pin wise description
196 * ti_iodelay_pinconf_set() - Configure the pin configuration
202 * while in Isolation. But, then, isolation also implies that every pin
395 * ti_iodelay_offset_to_pin() - get a pin index based on the register offset
422 * @pins: Array of pins in the pin group
423 * @pin_index: Pin index in the pin array
436 int pin; local
456 pin
656 ti_iodelay_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s, unsigned int pin) argument
749 struct pinctrl_pin_desc *pin; local
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/linux-master/arch/x86/kernel/acpi/
H A Dboot.c446 u8 pin; local
456 pin = pdev->pin;
463 mp_irq.srcbusirq = (((devfn >> 3) & 0x1f) << 2) | ((pin - 1) & 3);
476 int ioapic, pin; local
478 /* Convert 'gsi' to 'ioapic.pin'(INTIN#) */
485 pin = mp_find_ioapic_pin(ioapic, gsi);
493 mp_irq.dstirq = pin;
1172 int ioapic, pin; local
1187 pin
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/linux-master/drivers/media/cec/core/
H A Dcec-api.c21 #include <media/cec-pin.h>
23 #include "cec-pin-priv.h"
598 if (adap->pin && adap->pin->ops->read_hpd &&
600 err = adap->pin->ops->read_hpd(adap);
607 if (adap->pin && adap->pin->ops->read_5v &&
609 err = adap->pin->ops->read_5v(adap);
/linux-master/include/soc/fsl/qe/
H A Dqe.h73 QE_RSYNC_PIN, /* RSYNC from pin */
74 QE_TSYNC_PIN, /* TSYNC from pin */
155 extern void __par_io_config_pin(struct qe_pio_regs __iomem *par_io, u8 pin,
161 extern int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain,
163 extern int par_io_data_set(u8 port, u8 pin, u8 val);
167 static inline int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain, argument
169 static inline int par_io_data_set(u8 port, u8 pin, u8 val) { return -ENOSYS; } argument
181 extern void qe_pin_set_dedicated(struct qe_pin *pin);
189 static inline void qe_pin_set_dedicated(struct qe_pin *pin) {} argument
/linux-master/drivers/net/dsa/mv88e6xxx/
H A Dchip.h368 /* A switch may have a GPIO line tied to its reset pin. Parse
682 /* Get/set data on GPIO pin */
683 int (*get_data)(struct mv88e6xxx_chip *chip, unsigned int pin);
684 int (*set_data)(struct mv88e6xxx_chip *chip, unsigned int pin,
688 int (*get_dir)(struct mv88e6xxx_chip *chip, unsigned int pin);
689 int (*set_dir)(struct mv88e6xxx_chip *chip, unsigned int pin,
692 /* get/set GPIO pin control */
693 int (*get_pctl)(struct mv88e6xxx_chip *chip, unsigned int pin,
695 int (*set_pctl)(struct mv88e6xxx_chip *chip, unsigned int pin,
721 int (*ptp_verify)(struct ptp_clock_info *ptp, unsigned int pin,
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/linux-master/drivers/pinctrl/nuvoton/
H A Dpinctrl-npcm8xx.c592 * pin: name, number
1819 /* Enable mode in pin group */
1820 static void npcm8xx_setfunc(struct regmap *gcr_regmap, const unsigned int *pin, argument
1827 cfg = &pincfg[pin[i]];
1860 struct regmap *gcr_regmap, unsigned int pin)
1862 int gpio = pin % bank->gc.ngpio;
1866 if (pincfg[pin].flag & SLEW)
1869 if (pincfg[pin].flag & SLEWLPC) {
1878 struct regmap *gcr_regmap, unsigned int pin,
1882 int gpio = BIT(pin
1859 npcm8xx_get_slew_rate(struct npcm8xx_gpio *bank, struct regmap *gcr_regmap, unsigned int pin) argument
1877 npcm8xx_set_slew_rate(struct npcm8xx_gpio *bank, struct regmap *gcr_regmap, unsigned int pin, int arg) argument
1916 npcm8xx_get_drive_strength(struct pinctrl_dev *pctldev, unsigned int pin) argument
1938 npcm8xx_set_drive_strength(struct npcm8xx_pinctrl *npcm, unsigned int pin, int nval) argument
2044 const unsigned int *pin = &offset; local
2160 npcm_set_debounce(struct npcm8xx_pinctrl *npcm, unsigned int pin, u32 nanosecs) argument
2185 npcm8xx_config_get(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *config) argument
2248 npcm8xx_config_set_one(struct npcm8xx_pinctrl *npcm, unsigned int pin, unsigned long config) argument
2297 npcm8xx_config_set(struct pinctrl_dev *pctldev, unsigned int pin, unsigned long *configs, unsigned int num_configs) argument
[all...]
/linux-master/drivers/iio/imu/bmi160/
H A Dbmi160_core.c553 static int bmi160_config_pin(struct regmap *regmap, enum bmi160_int_pin pin, argument
566 switch (pin) {
581 * Enable the requested pin with the right settings:
599 /* Set the pin to input mode with no latching. */
606 /* Map interrupts to the requested pin. */
611 switch (pin) {
619 dev_err(dev, "Failed to configure %s IRQ pin", pin_name);
638 static int bmi160_get_irq(struct fwnode_handle *fwnode, enum bmi160_int_pin *pin) argument
645 *pin = BMI160_PIN_INT1;
651 *pin
656 bmi160_config_device_irq(struct iio_dev *indio_dev, int irq_type, enum bmi160_int_pin pin) argument
685 bmi160_setup_irq(struct iio_dev *indio_dev, int irq, enum bmi160_int_pin pin) argument
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/linux-master/include/sound/
H A Dsoc-dapm.h503 /* dapm audio pin control and status */
504 int snd_soc_dapm_enable_pin(struct snd_soc_dapm_context *dapm, const char *pin);
505 int snd_soc_dapm_enable_pin_unlocked(struct snd_soc_dapm_context *dapm, const char *pin);
506 int snd_soc_dapm_disable_pin(struct snd_soc_dapm_context *dapm, const char *pin);
507 int snd_soc_dapm_disable_pin_unlocked(struct snd_soc_dapm_context *dapm, const char *pin);
508 int snd_soc_dapm_nc_pin(struct snd_soc_dapm_context *dapm, const char *pin);
509 int snd_soc_dapm_nc_pin_unlocked(struct snd_soc_dapm_context *dapm, const char *pin);
510 int snd_soc_dapm_get_pin_status(struct snd_soc_dapm_context *dapm, const char *pin);
513 int snd_soc_dapm_force_enable_pin(struct snd_soc_dapm_context *dapm, const char *pin);
514 int snd_soc_dapm_force_enable_pin_unlocked(struct snd_soc_dapm_context *dapm, const char *pin);
[all...]
/linux-master/drivers/staging/media/atomisp/pci/
H A Datomisp_csi2_bridge.c319 u16 pin; local
326 pin = agpio->pin_table[0];
328 if (INTEL_GPIO_DSM_PIN(data->settings[i]) == pin) {
336 "%s: Could not find DSM GPIO settings for pin %u\n",
337 dev_name(&data->adev->dev), pin);
349 acpi_handle_warn(data->adev->handle, "%s: Unknown GPIO type 0x%02lx for pin %u\n",
351 INTEL_GPIO_DSM_TYPE(settings), pin);
358 * when the sensor-on-value (which is the physical pin value) is high,
375 acpi_handle_info(data->adev->handle, "%s: %s crs %d %s pin %u active-%s\n",
378 pin, active_lo
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<<11121314151617181920>>