/linux-master/drivers/media/platform/ti/cal/ |
H A D | cal.c | 300 static void cal_ctx_csi2_config(struct cal_ctx *ctx) argument 304 val = cal_read(ctx->cal, CAL_CSI2_CTX(ctx->phy->instance, ctx->csi2_ctx)); 305 cal_set_field(&val, ctx->cport, CAL_CSI2_CTX_CPORT_MASK); 314 cal_set_field(&val, ctx->datatype, CAL_CSI2_CTX_DT_MASK); 315 cal_set_field(&val, ctx->vc, CAL_CSI2_CTX_VC_MASK); 316 cal_set_field(&val, ctx->v_fmt.fmt.pix.height, CAL_CSI2_CTX_LINES_MASK); 320 cal_write(ctx->cal, CAL_CSI2_CTX(ctx 326 cal_ctx_pix_proc_config(struct cal_ctx *ctx) argument 377 cal_ctx_wr_dma_config(struct cal_ctx *ctx) argument 414 cal_ctx_set_dma_addr(struct cal_ctx *ctx, dma_addr_t addr) argument 419 cal_ctx_wr_dma_enable(struct cal_ctx *ctx) argument 428 cal_ctx_wr_dma_disable(struct cal_ctx *ctx) argument 437 cal_ctx_wr_dma_stopped(struct cal_ctx *ctx) argument 449 cal_get_remote_frame_desc_entry(struct cal_ctx *ctx, struct v4l2_mbus_frame_desc_entry *entry) argument 473 cal_ctx_prepare(struct cal_ctx *ctx) argument 508 cal_ctx_unprepare(struct cal_ctx *ctx) argument 514 cal_ctx_start(struct cal_ctx *ctx) argument 549 cal_ctx_stop(struct cal_ctx *ctx) argument 601 cal_update_seq_number(struct cal_ctx *ctx) argument 624 cal_irq_wdma_start(struct cal_ctx *ctx) argument 658 cal_irq_wdma_end(struct cal_ctx *ctx) argument 688 cal_irq_handle_wdma(struct cal_ctx *ctx, bool start, bool end) argument 1009 struct cal_ctx *ctx; local 1031 cal_ctx_destroy(struct cal_ctx *ctx) argument [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dce80/ |
H A D | dce80_timing_generator.h | 35 struct dc_context *ctx,
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/linux-master/drivers/gpu/drm/amd/display/dc/dce120/ |
H A D | dce120_timing_generator.h | 36 struct dc_context *ctx,
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/linux-master/crypto/ |
H A D | 842.c | 33 void *ctx; local 35 ctx = kmalloc(SW842_MEM_COMPRESS, GFP_KERNEL); 36 if (!ctx) 39 return ctx; 44 struct crypto842_ctx *ctx = crypto_tfm_ctx(tfm); local 46 ctx->wmem = crypto842_alloc_ctx(NULL); 47 if (IS_ERR(ctx->wmem)) 53 static void crypto842_free_ctx(struct crypto_scomp *tfm, void *ctx) argument 55 kfree(ctx); 60 struct crypto842_ctx *ctx local 69 struct crypto842_ctx *ctx = crypto_tfm_ctx(tfm); local 74 crypto842_scompress(struct crypto_scomp *tfm, const u8 *src, unsigned int slen, u8 *dst, unsigned int *dlen, void *ctx) argument 88 crypto842_sdecompress(struct crypto_scomp *tfm, const u8 *src, unsigned int slen, u8 *dst, unsigned int *dlen, void *ctx) argument [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dce60/ |
H A D | dce60_timing_generator.h | 35 struct dc_context *ctx,
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/linux-master/tools/testing/selftests/bpf/progs/ |
H A D | bpf_iter_task_btf.c | 16 int dump_task_struct(struct bpf_iter__task *ctx) argument 18 struct seq_file *seq = ctx->meta->seq; 19 struct task_struct *task = ctx->task; 27 if (ctx->meta->seq_num == 0)
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H A D | xdp_dummy.c | 8 int xdp_dummy_prog(struct xdp_md *ctx) argument
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H A D | cgroup_iter.c | 18 int cgroup_id_printer(struct bpf_iter__cgroup *ctx) argument 20 struct seq_file *seq = ctx->meta->seq; 21 struct cgroup *cgrp = ctx->cgroup; 30 if (ctx->meta->seq_num == 0)
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H A D | kfunc_call_race.c | 7 int kfunc_call_fail(struct __sk_buff *ctx) argument
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H A D | test_netfilter_link_attach.c | 9 int nf_link_attach_test(struct bpf_nf_ctx *ctx) argument
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H A D | test_xdp_attach_fail.c | 39 int tp__xdp__bpf_xdp_link_attach_failed(struct xdp_attach_error_ctx *ctx) argument 41 char *msg = (void *)(__u64) ((void *) ctx + (__u16) ctx->msg); 45 bpf_perf_event_output(ctx, &xdp_errmsg_pb, BPF_F_CURRENT_CPU, &errmsg,
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H A D | freplace_unreliable_prog.c | 10 * program has `stuct whatever *ctx` argument, so freplace operation will be 15 int replace_btf_unreliable_kprobe(bpf_user_pt_regs_t *ctx) argument
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn201/ |
H A D | dcn201_dccg.h | 32 struct dc_context *ctx,
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/linux-master/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn201/ |
H A D | dcn201_clk_mgr.h | 29 void dcn201_clk_mgr_construct(struct dc_context *ctx,
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/linux-master/drivers/media/platform/mediatek/mdp/ |
H A D | mtk_mdp_m2m.h | 10 void mtk_mdp_ctx_state_lock_set(struct mtk_mdp_ctx *ctx, u32 state);
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/linux-master/drivers/media/platform/verisilicon/ |
H A D | hantro_jpeg.h | 15 void hantro_jpeg_header_assemble(struct hantro_jpeg_ctx *ctx);
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn21/ |
H A D | dcn21_dccg.h | 30 struct dc_context *ctx,
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/linux-master/drivers/media/platform/mediatek/vcodec/decoder/ |
H A D | vdec_drv_if.h | 67 * @ctx : [in] v4l2 context 70 int vdec_if_init(struct mtk_vcodec_dec_ctx *ctx, unsigned int fourcc); 74 * @ctx : [in] v4l2 context 77 void vdec_if_deinit(struct mtk_vcodec_dec_ctx *ctx); 81 * @ctx : [in] v4l2 context 91 int vdec_if_decode(struct mtk_vcodec_dec_ctx *ctx, struct mtk_vcodec_mem *bs, 96 * @ctx : [in] v4l2 context 100 int vdec_if_get_param(struct mtk_vcodec_dec_ctx *ctx, enum vdec_get_param_type type,
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/linux-master/drivers/gpu/drm/amd/display/dc/dcn35/ |
H A D | dcn35_dwb.c | 32 dwbc30->base.ctx 41 dwbc30->base.ctx->logger 44 struct dc_context *ctx, 50 dcn30_dwbc_construct(dwbc30, ctx, dwbc_regs, 43 dcn35_dwbc_construct(struct dcn30_dwbc *dwbc30, struct dc_context *ctx, const struct dcn30_dwbc_registers *dwbc_regs, const struct dcn35_dwbc_shift *dwbc_shift, const struct dcn35_dwbc_mask *dwbc_mask, int inst) argument
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/linux-master/drivers/gpu/drm/amd/display/dc/dml2/ |
H A D | dml2_dc_resource_mgmt.h | 36 * @ctx: Input dml2 context 48 bool dml2_map_dc_pipes(struct dml2_context *ctx, struct dc_state *state, const struct dml_display_cfg_st *disp_cfg, struct dml2_dml_to_dc_pipe_mapping *mapping, const struct dc_state *existing_state);
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/linux-master/drivers/gpu/drm/panel/ |
H A D | panel-raydium-rm692e5.c | 34 static void rm692e5_reset(struct rm692e5_panel *ctx) argument 36 gpiod_set_value_cansleep(ctx->reset_gpio, 0); 38 gpiod_set_value_cansleep(ctx->reset_gpio, 1); 40 gpiod_set_value_cansleep(ctx->reset_gpio, 0); 44 static int rm692e5_on(struct rm692e5_panel *ctx) argument 46 struct mipi_dsi_device *dsi = ctx->dsi; 142 struct rm692e5_panel *ctx = to_rm692e5_panel(panel); local 143 struct mipi_dsi_device *dsi = ctx->dsi; 169 struct rm692e5_panel *ctx = to_rm692e5_panel(panel); local 171 struct device *dev = &ctx 223 struct rm692e5_panel *ctx = to_rm692e5_panel(panel); local 331 struct rm692e5_panel *ctx; local 396 struct rm692e5_panel *ctx = mipi_dsi_get_drvdata(dsi); local [all...] |
/linux-master/drivers/gpu/drm/amd/display/dc/dsc/dcn35/ |
H A D | dcn35_dsc.c | 32 dsc20->base.ctx 43 dsc->ctx->logger 46 struct dc_context *ctx, 52 dsc2_construct(dsc, ctx, inst, dsc_regs, 45 dsc35_construct(struct dcn20_dsc *dsc, struct dc_context *ctx, int inst, const struct dcn20_dsc_registers *dsc_regs, const struct dcn35_dsc_shift *dsc_shift, const struct dcn35_dsc_mask *dsc_mask) argument
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/linux-master/drivers/gpu/drm/msm/disp/dpu1/ |
H A D | dpu_hw_dspp.c | 27 static void dpu_setup_dspp_pcc(struct dpu_hw_dspp *ctx, argument 33 if (!ctx) { 34 DRM_ERROR("invalid ctx %pK\n", ctx); 38 base = ctx->cap->sblk->pcc.base; 41 DRM_ERROR("invalid ctx %pK pcc base 0x%x\n", ctx, base); 47 DPU_REG_WRITE(&ctx->hw, base, PCC_DIS); 51 DPU_REG_WRITE(&ctx->hw, base + PCC_RED_R_OFF, cfg->r.r); 52 DPU_REG_WRITE(&ctx [all...] |
/linux-master/tools/testing/selftests/net/ |
H A D | xdp_dummy.c | 8 int xdp_dummy_prog(struct xdp_md *ctx) argument
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/linux-master/drivers/net/dsa/realtek/ |
H A D | rtl83xx.h | 7 int (*reg_read)(void *ctx, u32 reg, u32 *val); 8 int (*reg_write)(void *ctx, u32 reg, u32 val); 11 void rtl83xx_lock(void *ctx); 12 void rtl83xx_unlock(void *ctx);
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