Searched refs:target (Results 276 - 300 of 1558) sorted by path

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/linux-master/drivers/cpufreq/
H A Dsh-cpufreq.c44 struct cpufreq_target *target = arg; local
45 struct cpufreq_policy *policy = target->policy;
58 freq = clk_round_rate(cpuclk, target->freq * 1000);
63 dev_dbg(dev, "requested frequency %u Hz\n", target->freq * 1000);
69 cpufreq_freq_transition_begin(target->policy, &freqs);
71 cpufreq_freq_transition_end(target->policy, &freqs, 0);
152 .target = sh_cpufreq_target,
/linux-master/drivers/cpuidle/governors/
H A Dmenu.c391 * state's target residency matches the time till the
420 * The tick is not going to be stopped and the target
465 struct cpuidle_state *target = &drv->states[last_idx]; local
510 if (measured_ns > 2 * target->exit_latency_ns)
511 measured_ns -= target->exit_latency_ns;
/linux-master/drivers/crypto/axis/
H A Dartpec6_crypto.c1003 unsigned int mod, target, diff, pad_bytes, size_bytes; local
1011 target = 448 / 8;
1016 target = 896 / 8;
1022 target -= 1;
1024 pad_bytes = diff > target ? target + mod - diff : target - diff;
/linux-master/drivers/crypto/intel/ixp4xx/
H A Dixp4xx_crypto.c680 static int register_chain_var(struct crypto_tfm *tfm, u8 xpad, u32 target, argument
720 crypt->icv_rev_aes = target;
/linux-master/drivers/crypto/nx/
H A Dnx-common-powernv.c376 CSB_ERR(csb, "TPBC not provided, unknown target length");
409 ret = setup_ddl(&crb->target, wmem->ddl_out,
/linux-master/drivers/cxl/
H A Dacpi.c74 return cxlrd->cxlsd.target[n];
H A Dcxl.h417 * @nr_targets: number of elements in @target
418 * @target: active ordered target list in current decoder configuration
424 * interleave-width, and the target list are mutable.
429 struct cxl_dport *target[]; member in struct:cxl_switch_decoder
516 * @type: Endpoint decoder target type
661 * @port_id: unique hardware identifier for dport in decoder target list
/linux-master/drivers/cxl/core/
H A Dcdat.c338 if (host_bridge == cxlsd->target[i]->dport_dev)
H A Dhdm.c569 struct cxl_dport **t = &cxlsd->target[0];
950 * host and target.
H A Dport.c154 struct cxl_dport *dport = cxlsd->target[i];
161 next = cxlsd->target[i + 1];
1197 * @port_id: identifier for this dport in a decoder's target list
1228 * @port_id: identifier for this dport in a decoder's target list
1730 cxlsd->target[i] = dport;
1747 return cxlrd->cxlsd.target[pos % iw];
1829 cxlrd = kzalloc(struct_size(cxlrd, cxlsd.target, nr_targets),
1884 cxlsd = kzalloc(struct_size(cxlsd, target, nr_targets), GFP_KERNEL);
H A Dregion.c1031 * in particular decoder target lists.
1043 * - account for how many entries in @port's target list are needed to
1081 * New target port, or @port is an endpoint port that always
1082 * accounts its own local decode as a target.
1147 * never target more than one endpoint by definition
1234 dev_dbg(&cxlr->dev, "%s:%s: invalid target count %d\n",
1253 if (ep->dport == cxlsd->target[i]) {
1381 if (cxlsd->target[cxl_rr->nr_targets_set] != ep->dport) {
1390 cxlsd->target[cxl_rr->nr_targets_set] = ep->dport;
1394 dev_dbg(&cxlr->dev, "%s:%s target[
[all...]
/linux-master/drivers/devfreq/
H A Ddevfreq.c166 * @freq: the target frequency
214 * @freq: the update target frequency
363 err = devfreq->profile->target(devfreq->dev.parent, &new_freq, flags);
2061 * freq value given to target callback.
2063 * @freq: The frequency given to target function
H A Dexynos-bus.c299 profile->target = exynos_bus_target;
359 profile->target = exynos_bus_target;
H A Dimx-bus.c120 priv->profile.target = imx_bus_target;
H A Dimx8m-ddrc.c420 priv->profile.target = imx8m_ddrc_target;
H A Dmtk-cci-devfreq.c180 /* set the original clock to target rate. */
246 .target = mtk_ccifreq_target,
310 * We assume min voltage is 0 and tracking target voltage using
H A Drk3399_dmc.c434 .target = rk3399_dmcfreq_target,
H A Dsun8i-a33-mbus.c402 priv->profile.target = sun8i_a33_mbus_set_dram_target;
H A Dtegra30-devfreq.c164 * Extra frequency to increase the target by due to consecutive
688 .target = tegra_devfreq_target,
/linux-master/drivers/devfreq/event/
H A Drockchip-dfi.c559 int target; local
564 target = cpumask_any_but(cpu_online_mask, cpu);
565 if (target >= nr_cpu_ids)
568 perf_pmu_migrate_context(&dfi->pmu, cpu, target);
569 dfi->cpu = target;
/linux-master/drivers/dma/idxd/
H A Dperfmon.c523 unsigned int target; local
530 target = cpumask_any_but(cpu_online_mask, cpu);
531 /* migrate events if there is a valid target */
532 if (target < nr_cpu_ids) {
533 cpumask_set_cpu(target, &perfmon_dsa_cpu_mask);
534 perf_pmu_migrate_context(&idxd_pmu->pmu, cpu, target);
/linux-master/drivers/dma/
H A Dmv_xor.c489 u8 target, attr; local
515 ret = mvebu_mbus_get_io_win_info(addr, &size, &target, &attr);
538 writel((addr & 0xffff0000) | (attr << 8) | target,
H A Dste_dma40_ll.c268 dma_addr_t target,
282 if (!target)
288 dma_addr_t dst = target ?: sg_addr;
266 d40_phy_sg_to_lli(struct scatterlist *sg, int sg_len, dma_addr_t target, struct d40_phy_lli *lli_sg, dma_addr_t lli_phys, u32 reg_cfg, struct stedma40_half_channel_info *info, struct stedma40_half_channel_info *otherinfo, unsigned long flags) argument
/linux-master/drivers/dma/xilinx/
H A Dxdma-regs.h95 #define XDMA_CHAN_CHECK_TARGET(id, target) \
96 (((u32)(id) >> 16) == XDMA_CHAN_MAGIC + (target))
H A Dxdma.c414 u32 base, identifier, target; local
420 target = XDMA_CHAN_H2C_TARGET;
425 target = XDMA_CHAN_C2H_TARGET;
441 if (XDMA_CHAN_CHECK_TARGET(identifier, target))
461 if (!XDMA_CHAN_CHECK_TARGET(identifier, target))

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