Searched refs:channel (Results 251 - 275 of 1958) sorted by relevance

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/linux-master/drivers/iio/dac/
H A Dti-dac7612.c40 static int dac7612_cmd_single(struct dac7612 *priv, int channel, u16 val) argument
44 priv->data[0] = BIT(DAC7612_START) | (channel << DAC7612_ADDRESS);
48 priv->cache[channel] = val;
62 .channel = (chan), \
84 *val = priv->cache[chan->channel];
109 if (val == priv->cache[chan->channel])
113 ret = dac7612_cmd_single(priv, chan->channel, val);
/linux-master/drivers/gpu/drm/sun4i/
H A Dsun8i_vi_layer.c21 static void sun8i_vi_layer_enable(struct sun8i_mixer *mixer, int channel, argument
28 ch_base = sun8i_channel_base(mixer, channel);
30 DRM_DEBUG_DRIVER("%sabling VI channel %d overlay %d\n",
31 enable ? "En" : "Dis", channel, overlay);
61 val = channel << SUN8I_MIXER_BLEND_ROUTE_PIPE_SHIFT(zpos);
70 static void sun8i_vi_layer_update_alpha(struct sun8i_mixer *mixer, int channel, argument
75 ch_base = sun8i_channel_base(mixer, channel);
100 static int sun8i_vi_layer_update_coord(struct sun8i_mixer *mixer, int channel, argument
114 DRM_DEBUG_DRIVER("Updating VI channel %d overlay %d\n",
115 channel, overla
261 sun8i_vi_layer_update_formats(struct sun8i_mixer *mixer, int channel, int overlay, struct drm_plane *plane) argument
305 sun8i_vi_layer_update_buffer(struct sun8i_mixer *mixer, int channel, int overlay, struct drm_plane *plane) argument
[all...]
/linux-master/drivers/vdpa/solidrun/
H A Dsnet_hwmon.c35 u32 attr, int channel)
41 u32 attr, int channel, long *val)
96 if (channel == 0)
102 if (channel == 0)
108 if (channel == 0)
129 int channel, const char **str)
144 if (channel == 0)
33 snet_howmon_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) argument
40 snet_howmon_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) argument
127 snet_hwmon_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, const char **str) argument
/linux-master/drivers/iio/adc/
H A Dsc27xx_adc.c67 /* Maximum ADC channel number */
76 /* ADC specific channel reference voltage 3.5V */
79 /* ADC default channel reference voltage is 2.8V */
112 int (*get_ratio)(int channel, int scale);
220 static int sc2720_adc_get_ratio(int channel, int scale) argument
222 switch (channel) {
281 static int sc2721_adc_get_ratio(int channel, int scale) argument
283 switch (channel) {
308 static int sc2730_adc_get_ratio(int channel, int scale) argument
310 switch (channel) {
382 sc2731_adc_get_ratio(int channel, int scale) argument
484 sc27xx_adc_read(struct sc27xx_adc_data *data, int channel, int scale, int *val) argument
584 sc27xx_adc_volt_ratio(struct sc27xx_adc_data *data, int channel, int scale, struct u32_fract *fract) argument
616 sc27xx_adc_convert_volt(struct sc27xx_adc_data *data, int channel, int scale, int raw_adc) argument
646 sc27xx_adc_read_processed(struct sc27xx_adc_data *data, int channel, int scale, int *val) argument
[all...]
H A Dcc10001_adc.c91 unsigned int channel)
96 val = (channel & CC10001_ADC_CH_MASK) | CC10001_ADC_MODE_SINGLE_CONV;
106 unsigned int channel,
122 CC10001_ADC_CH_MASK) != channel) {
140 unsigned int channel; local
163 channel = indio_dev->channels[scan_idx].channel;
164 cc10001_adc_start(adc_dev, channel);
166 data[i] = cc10001_adc_poll_done(indio_dev, channel, delay_ns);
169 "invalid sample on channel
90 cc10001_adc_start(struct cc10001_adc_device *adc_dev, unsigned int channel) argument
105 cc10001_adc_poll_done(struct iio_dev *indio_dev, unsigned int channel, unsigned int delay) argument
[all...]
H A Dimx7d_adc.c116 u32 channel; member in struct:imx7d_adc
147 .channel = (_idx), \
195 * Before sample set, disable channel A,B,C,D. Here we
225 /* enable channel A,B,C,D interrupt */
238 u32 channel; local
240 channel = info->channel;
242 /* the channel choose single conversion, and enable average mode */
248 * physical channel 0 chose logical channel
293 u32 channel; local
337 u32 channel; local
[all...]
H A Dti-adc0832.c47 .channel = chan, \
62 .channel = (chan1), \
135 static int adc0832_adc_conversion(struct adc0832 *adc, int channel, argument
154 adc->tx_buf[0] |= (channel % 2) << (adc->mux_bits - 1);
157 adc->tx_buf[0] |= channel / 2;
170 struct iio_chan_spec const *channel, int *value,
178 *value = adc0832_adc_conversion(adc, channel->channel,
179 channel->differential);
218 int ret = adc0832_adc_conversion(adc, scan_chan->channel,
169 adc0832_read_raw(struct iio_dev *iio, struct iio_chan_spec const *channel, int *value, int *shift, long mask) argument
[all...]
H A Dad7292.c48 .channel = _chan, \
68 .channel = 0,
147 static int ad7292_vin_range_multiplier(struct ad7292_state *st, int channel) argument
152 * Every AD7292 ADC channel may have its input range adjusted according
154 * For a given channel, the minimum input range is equal to Vref, and it
157 * If channel is being sampled with respect to AGND:
161 * If channel is being sampled with respect to AVDD:
184 if (AD7292_CH_SAMP_MODE(samp_mode, channel)) {
186 if (!AD7292_CH_VIN_RANGE(range0, channel))
189 if (!AD7292_CH_VIN_RANGE(range1, channel))
[all...]
/linux-master/drivers/hwmon/
H A Dnzxt-kraken2.c40 u32 attr, int channel)
46 u32 attr, int channel, long *val)
55 *val = priv->temp_input[channel];
58 *val = priv->fan_input[channel];
68 u32 attr, int channel, const char **str)
72 *str = kraken2_temp_label[channel];
75 *str = kraken2_fan_label[channel];
38 kraken2_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) argument
45 kraken2_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) argument
67 kraken2_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, const char **str) argument
H A Dtps23861.c140 static int tps23861_read_voltage(struct tps23861_data *data, int channel, argument
147 if (channel < TPS23861_NUM_PORTS) {
149 PORT_1_VOLTAGE_LSB + channel * PORT_N_VOLTAGE_LSB_OFFSET,
165 static int tps23861_read_current(struct tps23861_data *data, int channel, argument
179 PORT_1_CURRENT_LSB + channel * PORT_N_CURRENT_LSB_OFFSET,
190 static int tps23861_port_disable(struct tps23861_data *data, int channel) argument
195 regval |= BIT(channel + 4);
201 static int tps23861_port_enable(struct tps23861_data *data, int channel) argument
206 regval |= BIT(channel);
207 regval |= BIT(channel
213 tps23861_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) argument
248 tps23861_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) argument
276 tps23861_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) argument
325 tps23861_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, const char **str) argument
[all...]
H A Demc2305.c92 * @pwm_separate: separate PWM settings for every channel
93 * @pwm_min: array of minimum PWM per channel
137 * Otherwise, return specific channel that will be used in bound
191 * if common PWM channel is used.
230 static int emc2305_show_fault(struct device *dev, int channel) argument
240 return status_reg & (1 << channel) ? 1 : 0;
243 static int emc2305_show_fan(struct device *dev, int channel) argument
249 ret = i2c_smbus_read_word_swapped(client, EMC2305_REG_FAN_TACH(channel));
261 static int emc2305_show_pwm(struct device *dev, int channel) argument
266 return i2c_smbus_read_byte_data(client, EMC2305_REG_FAN_DRIVE(channel));
269 emc2305_set_pwm(struct device *dev, long val, int channel) argument
356 emc2305_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) argument
390 emc2305_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) argument
431 emc2305_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) argument
[all...]
H A Dw83627ehf.c700 store_in_##reg(struct device *dev, struct w83627ehf_data *data, int channel, \
706 data->in_##reg[channel] = in_to_reg(val, channel, data->scale_in); \
707 w83627ehf_write_value(data, W83627EHF_REG_IN_##REG(channel), \
708 data->in_##reg[channel]); \
717 store_fan_min(struct device *dev, struct w83627ehf_data *data, int channel, argument
729 data->fan_min[channel] = 255;
730 new_div = data->fan_div[channel]; /* No change */
732 channel + 1);
738 data->fan_min[channel]
803 store_temp_offset(struct device *dev, struct w83627ehf_data *data, int channel, long val) argument
816 store_pwm_mode(struct device *dev, struct w83627ehf_data *data, int channel, long val) argument
836 store_pwm(struct device *dev, struct w83627ehf_data *data, int channel, long val) argument
849 store_pwm_enable(struct device *dev, struct w83627ehf_data *data, int channel, long val) argument
1089 clear_caseopen(struct device *dev, struct w83627ehf_data *data, int channel, long val) argument
1337 w83627ehf_is_visible(const void *drvdata, enum hwmon_sensor_types type, u32 attr, int channel) argument
1430 w83627ehf_do_read_temp(struct w83627ehf_data *data, u32 attr, int channel, long *val) argument
1465 w83627ehf_do_read_in(struct w83627ehf_data *data, u32 attr, int channel, long *val) argument
1494 w83627ehf_do_read_fan(struct w83627ehf_data *data, u32 attr, int channel, long *val) argument
1522 w83627ehf_do_read_pwm(struct w83627ehf_data *data, u32 attr, int channel, long *val) argument
1542 w83627ehf_do_read_intrusion(struct w83627ehf_data *data, u32 attr, int channel, long *val) argument
1553 w83627ehf_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) argument
1582 w83627ehf_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, const char **str) argument
1603 w83627ehf_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) argument
[all...]
H A Dina3221.c99 * struct ina3221_input - channel input source specific information
100 * @label: label of channel input source
101 * @shunt_resistor: shunt resistor value of channel input source
102 * @disconnected: connection status of channel input source
103 * @summation_disable: channel summation status of input source
117 * @inputs: Array of channel input source specific structures
139 static inline bool ina3221_is_enabled(struct ina3221_data *ina, int channel) argument
141 /* Summation channel checks shunt resistor values */
142 if (channel > INA3221_CHANNEL3)
146 (ina->reg_config & INA3221_CONFIG_CHx_EN(channel));
277 ina3221_read_in(struct device *dev, u32 attr, int channel, long *val) argument
334 ina3221_read_curr(struct device *dev, u32 attr, int channel, long *val) argument
438 ina3221_write_curr(struct device *dev, u32 attr, int channel, long val) argument
484 ina3221_write_enable(struct device *dev, int channel, bool enable) argument
532 ina3221_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) argument
561 ina3221_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) argument
590 ina3221_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, const char **str) argument
604 ina3221_is_visible(const void *drvdata, enum hwmon_sensor_types type, u32 attr, int channel) argument
706 unsigned int channel = sd_attr->index; local
718 unsigned int channel = sd_attr->index; local
[all...]
/linux-master/drivers/edac/
H A Di5000_edac.c320 #define MAX_CSROWS (8*2) /* max possible csrows per channel */
354 int maxdimmperch; /* Max DIMMs per channel */
467 int channel; local
478 channel = EXTRACT_FBDCHAN_INDX(info->ferr_fat_fbd);
488 rank, channel, bank,
529 channel >> 1, channel & 1, rank,
552 int channel; local
574 channel = branch & 2;
583 rank, channel, channe
927 determine_amb_present_reg(struct i5000_pvt *pvt, int channel) argument
951 determine_mtr(struct i5000_pvt *pvt, int slot, int channel) argument
992 handle_channel(struct i5000_pvt *pvt, int slot, int channel, struct i5000_dimm_info *dinfo) argument
1037 int slot, channel, branch; local
1255 int channel; local
[all...]
/linux-master/drivers/soc/aspeed/
H A Daspeed-lpc-snoop.c186 int channel, u16 lpc_port)
193 init_waitqueue_head(&lpc_snoop->chan[channel].wq);
195 rc = kfifo_alloc(&lpc_snoop->chan[channel].fifo,
200 lpc_snoop->chan[channel].miscdev.minor = MISC_DYNAMIC_MINOR;
201 lpc_snoop->chan[channel].miscdev.name =
202 devm_kasprintf(dev, GFP_KERNEL, "%s%d", DEVICE_NAME, channel);
203 lpc_snoop->chan[channel].miscdev.fops = &snoop_fops;
204 lpc_snoop->chan[channel].miscdev.parent = dev;
205 rc = misc_register(&lpc_snoop->chan[channel].miscdev);
209 /* Enable LPC snoop channel a
184 aspeed_lpc_enable_snoop(struct aspeed_lpc_snoop *lpc_snoop, struct device *dev, int channel, u16 lpc_port) argument
237 aspeed_lpc_disable_snoop(struct aspeed_lpc_snoop *lpc_snoop, int channel) argument
[all...]
/linux-master/drivers/comedi/drivers/
H A Dcb_pcidda.c45 #define CB_DDA_DA_CTRL_DAC(x) ((x) << 2) /* Specify DAC channel */
56 #define CAL_CHANNEL_BITS(channel) (((channel) << 1) & CAL_CHANNEL_MASK)
222 unsigned int caldac, unsigned int channel,
228 /* caldacs use 3 bit channel specification */
234 /* write 3 bit channel */
235 cb_pcidda_serial_out(dev, channel, num_channel_bits);
254 /* set caldacs to eeprom values for given channel and range */
255 static void cb_pcidda_calibrate(struct comedi_device *dev, unsigned int channel, argument
259 unsigned int caldac = channel /
221 cb_pcidda_write_caldac(struct comedi_device *dev, unsigned int caldac, unsigned int channel, unsigned int value) argument
289 unsigned int channel = CR_CHAN(insn->chanspec); local
[all...]
/linux-master/drivers/video/fbdev/omap2/omapfb/dss/
H A Ddss.h255 int dss_dpi_select_source(int port, enum omap_channel channel);
276 enum omap_channel channel);
284 void dss_select_lcd_clk_source(enum omap_channel channel,
288 enum omap_dss_clk_source dss_get_lcd_clk_source(enum omap_channel channel);
378 bool dispc_mgr_timings_ok(enum omap_channel channel,
389 void dispc_mgr_set_clock_div(enum omap_channel channel,
391 int dispc_mgr_get_clock_div(enum omap_channel channel,
406 void dispc_mgr_enable(enum omap_channel channel, bool enable);
407 bool dispc_mgr_is_enabled(enum omap_channel channel);
408 u32 dispc_mgr_get_vsync_irq(enum omap_channel channel);
[all...]
H A Ddispc.h105 /* DISPC manager/channel specific registers */
106 static inline u16 DISPC_DEFAULT_COLOR(enum omap_channel channel) argument
108 switch (channel) {
123 static inline u16 DISPC_TRANS_COLOR(enum omap_channel channel) argument
125 switch (channel) {
140 static inline u16 DISPC_TIMING_H(enum omap_channel channel) argument
142 switch (channel) {
158 static inline u16 DISPC_TIMING_V(enum omap_channel channel) argument
160 switch (channel) {
176 static inline u16 DISPC_POL_FREQ(enum omap_channel channel) argument
194 DISPC_DIVISORo(enum omap_channel channel) argument
213 DISPC_SIZE_MGR(enum omap_channel channel) argument
230 DISPC_DATA_CYCLE1(enum omap_channel channel) argument
248 DISPC_DATA_CYCLE2(enum omap_channel channel) argument
266 DISPC_DATA_CYCLE3(enum omap_channel channel) argument
284 DISPC_CPR_COEF_R(enum omap_channel channel) argument
302 DISPC_CPR_COEF_G(enum omap_channel channel) argument
320 DISPC_CPR_COEF_B(enum omap_channel channel) argument
[all...]
/linux-master/drivers/soc/ti/
H A Dknav_qmss_acc.c44 queue = acc->channel - range->acc_info.start_channel;
69 mask = BIT(kq->acc->channel % 32);
70 offset = ACC_INTD_OFFSET_STATUS(kq->acc->channel);
87 int range_base, channel, queue = 0; local
105 channel = acc->channel;
108 dev_dbg(kdev->dev, "acc-irq: channel %d, list %d, virt %p, dma %pad\n",
109 channel, acc->list_index, list_cpu, &list_dma);
113 writel_relaxed(1, pdsp->intd + ACC_INTD_OFFSET_COUNT(channel));
115 writel_relaxed(ACC_CHANNEL_INT_BASE + channel,
432 int channel, channels; local
478 int ret, channel, channels; local
[all...]
/linux-master/drivers/net/wireless/mediatek/mt76/mt76x2/
H A Deeprom.c211 mt76x2_get_cal_channel_group(int channel) argument
213 if (channel >= 184 && channel <= 196)
215 if (channel <= 48)
217 if (channel <= 64)
219 if (channel <= 114)
221 if (channel <= 144)
227 mt76x2_get_5g_rx_gain(struct mt76x02_dev *dev, u8 channel) argument
231 group = mt76x2_get_cal_channel_group(channel);
257 int channel local
349 int channel = chan->hw_value; local
379 int channel = chan->hw_value; local
[all...]
/linux-master/drivers/dma/
H A Dimx-dma.c145 unsigned int channel; member in struct:imxdma_channel
182 struct imxdma_channel channel[IMX_DMA_CHANNELS]; member in struct:imxdma_engine
274 DMA_DAR(imxdmac->channel));
277 DMA_SAR(imxdmac->channel));
279 imx_dmav1_writel(imxdma, now, DMA_CNTR(imxdmac->channel));
281 dev_dbg(imxdma->dev, " %s channel: %d dst 0x%08x, src 0x%08x, "
282 "size 0x%08x\n", __func__, imxdmac->channel,
283 imx_dmav1_readl(imxdma, DMA_DAR(imxdmac->channel)),
284 imx_dmav1_readl(imxdma, DMA_SAR(imxdmac->channel)),
285 imx_dmav1_readl(imxdma, DMA_CNTR(imxdmac->channel)));
292 int channel = imxdmac->channel; local
323 int channel = imxdmac->channel; local
344 int channel = imxdmac->channel; local
[all...]
/linux-master/drivers/usb/musb/
H A Dtusb6010_omap.c59 * Allocate dmareq0 to the current channel unless it's already taken
99 struct dma_channel *channel = (struct dma_channel *)data; local
100 struct tusb_omap_dma_ch *chdat = to_chdat(channel);
128 channel->actual_len = chdat->transfer_len - remaining;
129 pio = chdat->len - channel->actual_len;
150 channel->actual_len += pio;
156 channel->status = MUSB_DMA_STATUS_FREE;
181 static int tusb_omap_dma_program(struct dma_channel *channel, u16 packet_sz, argument
184 struct tusb_omap_dma_ch *chdat = to_chdat(channel);
217 * using the channel fo
367 tusb_omap_dma_abort(struct dma_channel *channel) argument
429 struct dma_channel *channel = NULL; local
499 tusb_omap_dma_release(struct dma_channel *channel) argument
[all...]
/linux-master/drivers/gpu/drm/omapdrm/dss/
H A Ddispc.h108 /* DISPC manager/channel specific registers */
109 static inline u16 DISPC_DEFAULT_COLOR(enum omap_channel channel) argument
111 switch (channel) {
126 static inline u16 DISPC_TRANS_COLOR(enum omap_channel channel) argument
128 switch (channel) {
143 static inline u16 DISPC_TIMING_H(enum omap_channel channel) argument
145 switch (channel) {
161 static inline u16 DISPC_TIMING_V(enum omap_channel channel) argument
163 switch (channel) {
179 static inline u16 DISPC_POL_FREQ(enum omap_channel channel) argument
197 DISPC_DIVISORo(enum omap_channel channel) argument
216 DISPC_SIZE_MGR(enum omap_channel channel) argument
233 DISPC_DATA_CYCLE1(enum omap_channel channel) argument
251 DISPC_DATA_CYCLE2(enum omap_channel channel) argument
269 DISPC_DATA_CYCLE3(enum omap_channel channel) argument
287 DISPC_CPR_COEF_R(enum omap_channel channel) argument
305 DISPC_CPR_COEF_G(enum omap_channel channel) argument
323 DISPC_CPR_COEF_B(enum omap_channel channel) argument
[all...]
H A Ddss.h308 enum omap_channel channel);
328 enum omap_channel channel,
334 enum omap_channel channel);
414 enum omap_channel channel);
416 enum omap_channel channel);
418 enum omap_channel channel);
424 enum omap_channel channel, bool enable);
427 enum omap_channel channel);
429 void dispc_mgr_go(struct dispc_device *dispc, enum omap_channel channel);
432 enum omap_channel channel,
[all...]
/linux-master/drivers/scsi/aic7xxx/
H A Daic7xxx_proc.c48 u_int our_id, char channel,
135 u_int our_id, char channel, u_int target_id,
143 tinfo = ahc_fetch_transinfo(ahc, channel, our_id,
146 seq_printf(m, "Channel %c ", channel);
177 sdev->sdev_target->channel + 'A',
267 start_addr = 32 * (ahc->channel - 'A');
328 char channel; local
330 channel = 'A';
334 channel = 'B';
340 channel, target_i
134 ahc_dump_target_state(struct ahc_softc *ahc, struct seq_file *m, u_int our_id, char channel, u_int target_id, u_int target_offset) argument
[all...]

Completed in 217 milliseconds

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