Searched refs:reg_num (Results 26 - 50 of 161) sorted by relevance

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/linux-master/arch/riscv/kvm/
H A Dvcpu_vector.c96 unsigned long reg_num,
103 if (reg_num < KVM_REG_RISCV_VECTOR_REG(0)) {
106 switch (reg_num) {
126 } else if (reg_num <= KVM_REG_RISCV_VECTOR_REG(31)) {
130 (reg_num - KVM_REG_RISCV_VECTOR_REG(0)) * vlenb;
144 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | local
154 rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_size, &reg_addr);
170 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | local
180 if (reg_num == KVM_REG_RISCV_VECTOR_CSR_REG(vlenb)) {
192 rc = kvm_riscv_vcpu_vreg_addr(vcpu, reg_num, reg_siz
95 kvm_riscv_vcpu_vreg_addr(struct kvm_vcpu *vcpu, unsigned long reg_num, size_t reg_size, void **reg_addr) argument
[all...]
H A Dvcpu_timer.c165 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | local
172 if (reg_num >= sizeof(struct kvm_riscv_timer) / sizeof(u64))
175 switch (reg_num) {
205 unsigned long reg_num = reg->id & ~(KVM_REG_ARCH_MASK | local
213 if (reg_num >= sizeof(struct kvm_riscv_timer) / sizeof(u64))
219 switch (reg_num) {
H A Dvcpu_sbi_sta.c162 unsigned long reg_num,
165 switch (reg_num) {
183 unsigned long reg_num,
186 switch (reg_num) {
161 kvm_riscv_vcpu_get_reg_sbi_sta(struct kvm_vcpu *vcpu, unsigned long reg_num, unsigned long *reg_val) argument
182 kvm_riscv_vcpu_set_reg_sbi_sta(struct kvm_vcpu *vcpu, unsigned long reg_num, unsigned long reg_val) argument
H A Daia.c173 unsigned long reg_num,
178 if (reg_num >= sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long))
183 *out_val = ((unsigned long *)csr)[reg_num];
189 unsigned long reg_num,
194 if (reg_num >= sizeof(struct kvm_riscv_aia_csr) / sizeof(unsigned long))
198 ((unsigned long *)csr)[reg_num] = val;
201 if (reg_num == KVM_REG_RISCV_CSR_AIA_REG(siph))
172 kvm_riscv_vcpu_aia_get_csr(struct kvm_vcpu *vcpu, unsigned long reg_num, unsigned long *out_val) argument
188 kvm_riscv_vcpu_aia_set_csr(struct kvm_vcpu *vcpu, unsigned long reg_num, unsigned long val) argument
/linux-master/drivers/net/ethernet/hisilicon/hns3/hns3pf/
H A Dhclge_regs.c373 int entries_per_desc, reg_num, desc_index, index, i; local
378 reg_num = entries_per_desc * bd_num;
379 for (i = 0; i < reg_num; i++) {
385 return reg_num;
516 int i, j, reg_num; local
521 reg_num = ARRAY_SIZE(cmdq_reg_addr_list);
522 reg += hclge_reg_get_tlv(HCLGE_REG_TAG_CMDQ, reg_num, reg);
523 for (i = 0; i < reg_num; i++)
525 data_num_sum = reg_num + HCLGE_REG_TLV_SPACE;
527 reg_num
[all...]
/linux-master/arch/riscv/include/asm/
H A Dkvm_vcpu_sbi.h73 int kvm_riscv_vcpu_get_reg_sbi_sta(struct kvm_vcpu *vcpu, unsigned long reg_num,
75 int kvm_riscv_vcpu_set_reg_sbi_sta(struct kvm_vcpu *vcpu, unsigned long reg_num,
H A Dkvm_aia.h133 unsigned long reg_num,
136 unsigned long reg_num,
/linux-master/arch/powerpc/include/asm/
H A Dmpic_msgr.h25 * @reg_num: the MPIC message register to get
33 extern struct mpic_msgr *mpic_msgr_get(unsigned int reg_num);
/linux-master/sound/soc/codecs/aw88395/
H A Daw88395_lib.h71 unsigned int reg_num; member in struct:bin_header_info
/linux-master/drivers/input/keyboard/
H A Dbcm-keypad.c93 static void bcm_kp_report_keys(struct bcm_kp *kp, int reg_num, int pull_mode) argument
102 writel(0xFFFFFFFF, kp->base + KPICRN_OFFSET(reg_num));
104 state = readl(kp->base + KPSSRN_OFFSET(reg_num));
105 change = kp->last_state[reg_num] ^ state;
106 kp->last_state[reg_num] = state;
112 row = BIT_TO_ROW_SSRN(bit_nr, reg_num);
123 int reg_num; local
125 for (reg_num = 0; reg_num <= 1; reg_num
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/
H A Ddm_services.h165 #define get_reg_field_value_soc15(reg_value, block, reg_num, reg_name, reg_field)\
168 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\
169 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)
171 #define set_reg_field_value_soc15(reg_value, value, block, reg_num, reg_name, reg_field)\
175 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## _MASK,\
176 block ## reg_num ## _ ## reg_name ## __ ## reg_field ## __SHIFT)
/linux-master/drivers/soc/fsl/qe/
H A Ducc.c89 unsigned int *reg_num, unsigned int *shift)
93 *reg_num = cmx + 1;
101 unsigned int reg_num; local
108 get_cmxucr_reg(ucc_num, &cmxucr, &reg_num, &shift);
122 unsigned int reg_num; local
134 get_cmxucr_reg(ucc_num, &cmxucr, &reg_num, &shift);
136 switch (reg_num) {
88 get_cmxucr_reg(unsigned int ucc_num, __be32 __iomem **cmxucr, unsigned int *reg_num, unsigned int *shift) argument
/linux-master/drivers/crypto/intel/qat/qat_common/
H A Dqat_hal.c248 unsigned short reg_num)
255 reg_addr = 0x80 | (reg_num & 0x7f);
259 reg_addr = reg_num & 0x1f;
264 reg_addr = 0x180 | (reg_num & 0x1f);
267 reg_addr = 0x140 | ((reg_num & 0x3) << 1);
272 reg_addr = 0x1c0 | (reg_num & 0x1f);
275 reg_addr = 0x100 | ((reg_num & 0x3) << 1);
278 reg_addr = 0x280 | (reg_num & 0x1f);
293 reg_addr = 0x300 | (reg_num & 0xff);
1117 unsigned short reg_num, unsigne
247 qat_hal_get_reg_addr(unsigned int type, unsigned short reg_num) argument
1114 qat_hal_rd_rel_reg(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int *data) argument
1175 qat_hal_wr_rel_reg(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int data) argument
1329 qat_hal_put_rel_rd_xfer(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int val) argument
1370 qat_hal_put_rel_wr_xfer(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned char ctx, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int data) argument
1468 qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned long ctx_mask, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int regdata) argument
1502 qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned long ctx_mask, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int regdata) argument
1537 qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned long ctx_mask, enum icp_qat_uof_regtype reg_type, unsigned short reg_num, unsigned int regdata) argument
1572 qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle, unsigned char ae, unsigned long ctx_mask, unsigned short reg_num, unsigned int regdata) argument
[all...]
H A Dadf_common_drv.h166 unsigned short reg_num, unsigned int regdata);
170 unsigned short reg_num, unsigned int regdata);
174 unsigned short reg_num, unsigned int regdata);
177 unsigned short reg_num, unsigned int regdata);
/linux-master/drivers/staging/media/meson/vdec/
H A Dvdec_helpers.h17 * @reg_num: number of contiguous registers after each reg_base (including it)
20 u32 reg_base[], u32 reg_num[]);
/linux-master/drivers/w1/slaves/
H A Dw1_ds250x.c204 sl->master->bus_master->dev_id, sl->reg_num.family,
205 (unsigned long long)sl->reg_num.id);
209 sl->reg_num.family,
210 (unsigned long long)sl->reg_num.id);
H A Dw1_ds2405.c30 u64 dev_addr = le64_to_cpu(*(u64 *)&sl->reg_num);
182 u64 dev_addr = le64_to_cpu(*(u64 *)&sl->reg_num);
/linux-master/drivers/media/platform/verisilicon/
H A Dhantro_g1_h264_dec.c131 int reg_num; local
158 reg_num = 0;
166 vdpu_write_relaxed(vpu, reg, G1_REG_BD_REF_PIC(reg_num++));
186 reg_num = 0;
194 vdpu_write_relaxed(vpu, reg, G1_REG_FWD_PIC(reg_num++));
/linux-master/drivers/w1/
H A Dw1.c97 ssize_t count = sizeof(sl->reg_num);
99 memcpy(buf, (u8 *)&sl->reg_num, count);
438 if (sl->reg_num.family == rn->family &&
439 sl->reg_num.id == rn->id &&
440 sl->reg_num.crc == rn->crc) {
596 err = add_uevent_var(env, "W1_FID=%02X", sl->reg_num.family);
601 (unsigned long long)sl->reg_num.id);
677 (unsigned int) sl->reg_num.family,
678 (unsigned long long) sl->reg_num.id);
681 (unsigned int) sl->reg_num
[all...]
/linux-master/arch/arm64/include/asm/
H A Dkvm_emulate.h182 u8 reg_num)
184 return (reg_num == 31) ? 0 : vcpu_gp_regs(vcpu)->regs[reg_num];
187 static __always_inline void vcpu_set_reg(struct kvm_vcpu *vcpu, u8 reg_num, argument
190 if (reg_num != 31)
191 vcpu_gp_regs(vcpu)->regs[reg_num] = val;
181 vcpu_get_reg(const struct kvm_vcpu *vcpu, u8 reg_num) argument
/linux-master/drivers/video/fbdev/via/
H A Dvt1636.c69 int reg_num, i; local
72 reg_num = ARRAY_SIZE(common_init_data);
73 for (i = 0; i < reg_num; i++)
/linux-master/arch/sparc/kernel/
H A Dunaligned_32.c180 static int do_int_store(int reg_num, int size, unsigned long *dst_addr, argument
186 if (reg_num)
187 src_val = fetch_reg_addr(reg_num, regs);
/linux-master/arch/powerpc/sysdev/
H A Dmpic_msgr.c49 struct mpic_msgr *mpic_msgr_get(unsigned int reg_num) argument
57 if (reg_num >= mpic_msgr_count)
61 msgr = mpic_msgrs[reg_num];
/linux-master/drivers/mfd/
H A Dezx-pcap.c77 int ezx_pcap_write(struct pcap_chip *pcap, u8 reg_num, u32 value) argument
85 | (reg_num << PCAP_REGISTER_ADDRESS_SHIFT);
93 int ezx_pcap_read(struct pcap_chip *pcap, u8 reg_num, u32 *value) argument
100 | (reg_num << PCAP_REGISTER_ADDRESS_SHIFT);
109 int ezx_pcap_set_bits(struct pcap_chip *pcap, u8 reg_num, u32 mask, u32 val) argument
114 (reg_num << PCAP_REGISTER_ADDRESS_SHIFT);
123 (reg_num << PCAP_REGISTER_ADDRESS_SHIFT);
/linux-master/drivers/media/platform/mediatek/vcodec/decoder/
H A Dmtk_vcodec_dec_drv.c91 int reg_num, i; local
125 reg_num = of_property_count_elems_of_size(pdev->dev.of_node, "reg",
127 if (reg_num <= 0 || reg_num > num_max_vdec_regs) {
128 dev_err(&pdev->dev, "Invalid register property size: %d\n", reg_num);
133 for (i = 0; i < reg_num; i++) {
141 for (i = 0; i < reg_num; i++) {

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