/linux-master/arch/arm/mach-omap2/ |
H A D | omap-headsmp.S | 43 wait: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 44 ldr r0, [r2] 61 wait_2: ldr r2, =AUX_CORE_BOOT0_PA @ read from AuxCoreBoot0 62 ldr r0, [r2] 68 ldr r12, =API_HYP_ENTRY 82 hold: ldr r12,=0x103 99 hold_2: ldr r12,=0x103 123 ldr r1, =OMAP44XX_GIC_DIST_BASE 124 ldr r0, [r1]
|
H A D | sleep44xx.S | 71 ldr r9, [r0, #OMAP_TYPE_OFFSET] 77 ldr r12, =OMAP4_MON_SCU_PWR_INDEX 105 ldr r9, [r8, #OMAP_TYPE_OFFSET] 114 ldr r12, =OMAP4_MON_SCU_PWR_INDEX 159 ldr r0, =0xffff 162 ldr r0, [r2, #L2X0_CLEAN_INV_WAY] 163 ldr r1, =0xffff 177 ldr r0, [r2, #L2X0_CACHE_SYNC] 208 ldr r9, [r8, #OMAP_TYPE_OFFSET] 214 ldr r1 [all...] |
/linux-master/arch/arm/mach-davinci/ |
H A D | sleep.S | 43 ldr ip, CACHE_FLUSH 53 ldr ip, [r0, #DDR2_SDRCR_OFFSET] 58 ldr ip, [r0, #DDR2_SDRCR_OFFSET] 73 ldr ip, [r3, #PLLDIV1] 78 ldr ip, [r3, #PLLCTL] 89 ldr ip, [r3, #PLLCTL] 94 ldr ip, [r4] 102 ldr ip, [r4] 109 ldr ip, [r3, #PLLCTL] 114 ldr i [all...] |
/linux-master/arch/arm/include/debug/ |
H A D | imx.S | 29 ldr \rp, =UART_PADDR @ physical 30 ldr \rv, =UART_VADDR @ virtual 45 1002: ldr \rd, [\rx, #0x98] @ SR2
|
H A D | clps711x.S | 19 ldr \rv, =CLPS711X_UART_VADDR 20 ldr \rp, =CLPS711X_UART_PADDR 34 1001: ldr \rd, [\rx, #SYSFLG]
|
H A D | ux500.S | 35 ldr \rp, =UART_PHYS_BASE @ no, physical address 36 ldr \rv, =UART_VIRT_BASE @ yes, virtual address
|
H A D | samsung.S | 13 ldr \rd, [\rx, # S3C2410_UFSTAT] 19 ldr \rd, [\rx, # S3C2410_UFSTAT] 28 ldr \rd, [\rx, # S3C2410_UFSTAT] 38 ldr \rd, [\rx, # S3C2410_UFSTAT] 52 ldr \rd, [\rx, # S3C2410_UFCON] 64 ldr \rd, [\rx, # S3C2410_UTRSTAT] 76 ldr \rd, [\rx, # S3C2410_UFCON] 88 ldr \rd, [\rx, # S3C2410_UTRSTAT]
|
H A D | digicolor.S | 15 ldr \rp, =CONFIG_DEBUG_UART_PHYS 16 ldr \rv, =CONFIG_DEBUG_UART_VIRT
|
H A D | zynq.S | 28 ldr \rp, =LL_UART_PADDR @ physical 29 ldr \rv, =LL_UART_VADDR @ virtual 40 1001: ldr \rd, [\rx, #UART_SR_OFFSET] 47 1002: ldr \rd, [\rx, #UART_SR_OFFSET] @ get status register
|
H A D | stm32.S | 22 ldr \rp, =CONFIG_DEBUG_UART_PHYS @ physical base 23 ldr \rv, =CONFIG_DEBUG_UART_VIRT @ virt base 34 1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register 40 1001: ldr \rd, [\rx, #(STM32_USART_SR_OFF)] @ Read Status Register
|
H A D | at91.S | 14 ldr \rp, =CONFIG_DEBUG_UART_PHYS @ System peripherals (phys address) 15 ldr \rv, =CONFIG_DEBUG_UART_VIRT @ System peripherals (virt address) 23 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register 32 1001: ldr \rd, [\rx, #(AT91_DBGU_SR)] @ Read Status Register
|
H A D | omap2plus.S | 31 ldr \rv, [\rp] @ get absolute addr of 99f 33 ldr \rp, [\rp, #4] @ abs addr of omap_uart_phys 35 ldr \rp, [\tmp, #0] @ omap_uart_phys 36 ldr \rv, [\tmp, #4] @ omap_uart_virt 43 ldr \rp, =ZOOM_UART_BASE 45 ldr \rp, =ZOOM_UART_VIRT 58 ldr \tmp, [\tmp, #8] @ omap_uart_lsr
|
H A D | msm.S | 10 ldr \rp, =CONFIG_DEBUG_UART_PHYS 11 ldr \rv, =CONFIG_DEBUG_UART_VIRT 25 ldr \rd, [\rx, #0x08] 30 1001: ldr \rd, [\rx, #0x14] 44 ldr \rd, [\rx, #0x08]
|
/linux-master/arch/arm/lib/ |
H A D | csumpartialcopy.S | 35 ldr \reg1, [r0], #4 39 ldr \reg1, [r0], #4 40 ldr \reg2, [r0], #4
|
H A D | backtrace-clang.S | 124 1001: ldr sv_pc, [frame, #4] @ get saved 'pc' 125 1002: ldr sv_fp, [frame, #0] @ get saved fp 145 1003: ldr sv_lr, [sv_fp, #4] @ get saved lr from next frame 147 1004: ldr r0, [sv_lr, #-4] @ get call instruction 148 ldr r3, .Lopcode+4 155 ldr sv_pc, [sv_fp, #4] @ get lr address 183 1005: ldr r1, [sv_pc, #0] @ if stmfd sp!, {..., fp, lr} 184 ldr r3, .Lopcode @ instruction exists, 186 ldr r0, [frame] @ locals are stored in
|
/linux-master/tools/testing/selftests/arm64/fp/ |
H A D | za-fork-asm.S | 26 ldr x0, =scratch 47 ldr x0, =scratch 50 ldr x1, [x0]
|
/linux-master/arch/arm/vdso/ |
H A D | datapage.S | 12 ldr r1, [r0]
|
/linux-master/arch/arm64/kernel/ |
H A D | entry-ftrace.S | 52 ldr x11, [x11, #-(4 * AARCH64_INSN_SIZE)] // op 59 ldr x17, [x11, #FTRACE_OPS_DIRECT_CALL] // op->direct_call 104 ldr x4, [x2, #FTRACE_OPS_FUNC] // op->func 124 ldr x8, [sp, #FREGS_X8] 127 ldr x29, [sp, #FREGS_FP] 130 ldr x17, [sp, #FREGS_DIRECT_TRAMP] 135 ldr x30, [sp, #FREGS_LR] 136 ldr x9, [sp, #FREGS_PC] 155 ldr x9, [sp, #FREGS_LR] 156 ldr x3 [all...] |
H A D | relocate_kernel.S | 45 ldr x28, [x0, #KIMAGE_START] 46 ldr x27, [x0, #KIMAGE_ARCH_EL2_VECTORS] 47 ldr x26, [x0, #KIMAGE_ARCH_DTB_MEM] 50 ldr x18, [x0, #KIMAGE_ARCH_ZERO_PAGE] /* x18 = zero page for BBM */ 51 ldr x17, [x0, #KIMAGE_ARCH_TTBR1] /* x17 = linear map copy */ 52 ldr x16, [x0, #KIMAGE_HEAD] /* x16 = kimage_head */ 53 ldr x22, [x0, #KIMAGE_ARCH_PHYS_OFFSET] /* x22 phys_offset */ 77 ldr x16, [x14], #8 /* entry = *ptr++ */
|
/linux-master/arch/arm/crypto/ |
H A D | sha512-armv4.pl | 102 ldr $t2,[sp,#$Hoff+0] @ h.lo 104 ldr $t3,[sp,#$Hoff+4] @ h.hi 114 ldr $t0,[sp,#$Foff+0] @ f.lo 116 ldr $t1,[sp,#$Foff+4] @ f.hi 118 ldr $t2,[sp,#$Goff+0] @ g.lo 120 ldr $t3,[sp,#$Goff+4] @ g.hi 131 ldr $t2,[$Ktbl,#$lo] @ K[i].lo 133 ldr $t3,[$Ktbl,#$hi] @ K[i].hi 136 ldr $Elo,[sp,#$Doff+0] @ d.lo 138 ldr [all...] |
/linux-master/arch/arm64/include/asm/ |
H A D | kvm_mte.h | 26 ldr \reg1, [\g_ctxt, #CPU_RGSR_EL1] 28 ldr \reg1, [\g_ctxt, #CPU_GCR_EL1] 46 ldr \reg1, [\h_ctxt, #CPU_RGSR_EL1] 48 ldr \reg1, [\h_ctxt, #CPU_GCR_EL1]
|
/linux-master/arch/arm/mach-s3c/ |
H A D | sleep-s3c64xx.S | 41 ldr r2, =LL_UART /* for debug */
|
/linux-master/arch/arm/mach-socfpga/ |
H A D | headsmp.S | 25 ldr r3, [r2] 26 ldr r4, [r3]
|
/linux-master/arch/arm/mach-tegra/ |
H A D | sleep-tegra20.S | 53 ldr \rd, tegra_pll_state 58 ldr \rd, [\r_car_base, #\pll_base] 60 ldr \rd, tegra_pll_state 71 ldr \rd, [\r_car_base, #\pll_base] 79 ldr \rd, [\base, #EMC_ADR_CFG] 117 ldr r3, =TEGRA_FLOW_CTRL_VIRT 120 ldr r2, [r3, r1] 125 ldr r3, =TEGRA_CLK_RESET_VIRT 213 ldr r6, tegra20_sdram_pad_size 215 ldr r [all...] |
H A D | sleep-tegra30.S | 84 ldr \rd, [\base, #EMC_ADR_CFG] 94 ldr \rd, [\base, #EMC_EMC_STATUS] 100 ldr \rd, tegra_pll_state 105 ldr \rd, [\r_car_base, #\pll_base] 107 ldr \rd, tegra_pll_state 115 ldr \rd, [\pmc_base, #PMC_PLLP_WB0_OVERRIDE] 117 ldr \rd, tegra_pll_state 136 ldr \rd, [\r_car_base, #\pll_base] 142 ldr \rd, [\r_car_base, #\pll_misc] 145 ldr \r [all...] |