arm/mach-tegra/sleep-tegra30.S

84 	ldr	\rd, [\base, #EMC_ADR_CFG]
94 	ldr	\rd, [\base, #EMC_EMC_STATUS]
100 	ldr	\rd, tegra_pll_state
105 	ldr	\rd, [\r_car_base, #\pll_base]
107 	ldr	\rd, tegra_pll_state
115 	ldr	\rd, [\pmc_base, #PMC_PLLP_WB0_OVERRIDE]
117 	ldr	\rd, tegra_pll_state
136 	ldr	\rd, [\r_car_base, #\pll_base]
142 	ldr	\rd, [\r_car_base, #\pll_misc]
145 	ldr	\rd, [\r_car_base, #\pll_misc]
146 	ldr	\rd, [\r_car_base, #\pll_misc]
157 	ldr	\rd, [\r_car_base, #\pll_base]
164 	ldr	\rd, [\car, #\iddq]
170 	ldr	\rd, [\car, #\iddq]
208 	ldr	r12, =TEGRA_FLOW_CTRL_VIRT
235 	ldr	r3, [r1]			@ read CSR
254 	ldr	r0, [r2]
388 	ldr	r1, [r7]
430 	ldr	r1, [r0, #CLK_RESET_PLLP_BASE]
439 	ldr	r1, [r7]
445 	ldr	r4, [r5, #0x18]		@ restore CLK_SOURCE_MSELECT
448 	ldr	r4, [r5, #0x1C]		@ restore SCLK_BURST
456 	ldr	r1, [r5, #0x14]		@ PMC_IO_DPD_STATUS
473 	ldr	r1, [r5, #0xC]		@ restore EMC_XM2VTTGENPADCTRL
475 	ldr	r1, [r5, #0x10]		@ restore EMC_XM2VTTGENPADCTRL2
477 	ldr	r1, [r5, #0x8]		@ restore EMC_AUTO_CAL_INTERVAL
481 	ldr	r1, [r0, #EMC_CFG_DIG_DLL]
492 	ldr	r1, [r0, #EMC_AUTO_CAL_CONFIG]
498 	ldr	r1, [r0, #EMC_AUTO_CAL_STATUS]
502 	ldr	r1, [r0, #EMC_CFG]
516 	ldr	r2, [r0, #EMC_EMC_STATUS]
523 	ldr	r2, [r0, #EMC_FBIO_CFG5]
532 	ldr	r2, [r7]
542 	ldr	r2, [r7]
551 	ldr	r2, [r7]
561 	ldr	r2, [r7]
568 	ldr	r1, [r5, #0x4]		@ restore EMC_ZCAL_INTERVAL
570 	ldr	r1, [r5, #0x0]		@ restore EMC_CFG
586 	ldr	r0, [r0, #PMC_SCRATCH41]
674 	ldr	r1, [r7]
683 	ldr	r0, [r5, #CLK_RESET_CLK_SOURCE_MSELECT]
688 	ldr	r1, [r7]
701 	ldr	r0, [r4, #PMC_PLLP_WB0_OVERRIDE]
708 	ldr	r0, [r5, #CLK_RESET_PLLP_BASE]
716 	ldr	r0, [r5, #CLK_RESET_PLLA_BASE]
719 	ldr	r0, [r5, #CLK_RESET_PLLC_BASE]
722 	ldr	r0, [r5, #CLK_RESET_PLLX_BASE]
753 	ldr	r0, [r6, r2]
767 	ldr	r0, [r6, r2] /* memory barrier */
807 	ldr	r0, [r2, r9]		@ r0 is the addr in the pad_address
809 	ldr	r1, [r0]
831 	ldr	r1, [r0, #EMC_CFG]
838 	ldr	r1, [r7]
843 	ldr	r1, [r0, #EMC_AUTO_CAL_STATUS]
851 	ldr	r1, [r0, #EMC_EMC_STATUS]
861 	ldr	r2, [r0, #EMC_EMC_STATUS]
867 	ldr	r1, [r0, #EMC_XM2VTTGENPADCTRL]
871 	ldr	r1, [r0, #EMC_XM2VTTGENPADCTRL2]
888 	ldr	r1, [r4, #PMC_CTRL]