| /linux-master/drivers/regulator/ |
| H A D | da903x-regulator.c | 82 int enable_bit; member in struct:da903x_regulator_info
141 1 << info->enable_bit);
150 1 << info->enable_bit);
164 return !!(reg_val & (1 << info->enable_bit));
326 .enable_bit = (ebit), \
348 .enable_bit = (ebit), \
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| H A D | anatop-regulator.c | 290 u32 enable_bit; local
295 &enable_bit)) {
301 rdesc->enable_mask = BIT(enable_bit);
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| H A D | mc13892-regulator.c | 337 u32 en_val = mc13892_regulators[id].enable_bit;
338 u32 mask = mc13892_regulators[id].enable_bit;
362 dis_val = mc13892_regulators[id].enable_bit;
364 return mc13892_powermisc_rmw(priv, mc13892_regulators[id].enable_bit,
386 return (val & mc13892_regulators[id].enable_bit) != 0;
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| /linux-master/drivers/clk/spear/ |
| H A D | clk.h | 37 u32 enable_bit; member in struct:aux_clk_masks
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| H A D | clk-aux-synth.c | 38 .enable_bit = AUX_SYNT_ENB,
179 aux->masks->enable_bit, 0, lock);
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| /linux-master/drivers/thermal/intel/int340x_thermal/ |
| H A D | processor_thermal_device.h | 108 int processor_thermal_mbox_interrupt_config(struct pci_dev *pdev, bool enable, int enable_bit,
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| /linux-master/drivers/clk/ingenic/ |
| H A D | cgu.c | 239 if (pll_info->enable_bit >= 0 && (ctl & BIT(pll_info->enable_bit)))
257 if (pll_info->enable_bit < 0)
271 ctl |= BIT(pll_info->enable_bit);
290 if (pll_info->enable_bit < 0)
296 ctl &= ~BIT(pll_info->enable_bit);
310 if (pll_info->enable_bit < 0)
315 return !!(ctl & BIT(pll_info->enable_bit));
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| H A D | jz4740-cgu.c | 88 .enable_bit = 8,
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| H A D | jz4725b-cgu.c | 73 .enable_bit = 8,
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| H A D | jz4770-cgu.c | 120 .enable_bit = 8,
143 .enable_bit = 7,
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| H A D | jz4760-cgu.c | 110 .enable_bit = 8,
134 .enable_bit = 7,
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| H A D | x1000-cgu.c | 235 .enable_bit = 8,
258 .enable_bit = 7,
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| H A D | jz4755-cgu.c | 70 .enable_bit = 8,
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| /linux-master/drivers/watchdog/ |
| H A D | iTCO_wdt.c | 152 u32 enable_bit; local
157 enable_bit = 0x00000010;
160 enable_bit = 0x00000020;
165 enable_bit = 0x00000002;
169 return enable_bit;
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| /linux-master/drivers/clk/ti/ |
| H A D | apll.c | 379 clk_hw->enable_bit = ti_clk_get_legacy_bit_shift(node);
380 ad->enable_mask = 0x3 << clk_hw->enable_bit;
381 ad->autoidle_mask = 0x3 << clk_hw->enable_bit;
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| /linux-master/arch/arm/mach-omap1/ |
| H A D | clock.h | 67 * @enable_reg: register to write to enable the clock (see @enable_bit)
72 * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
88 u8 enable_bit; member in struct:omap1_clk
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| /linux-master/sound/soc/ux500/ |
| H A D | ux500_msp_i2s.c | 556 u32 reg_val_GCR, enable_bit; local
569 enable_bit = TX_ENABLE;
571 enable_bit = RX_ENABLE;
573 writel(reg_val_GCR | enable_bit, msp->registers + MSP_GCR);
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| /linux-master/tools/testing/selftests/user_events/ |
| H A D | dyn_test.c | 62 reg.enable_bit = bit;
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| H A D | abi_test.c | 157 reg.enable_bit = bit;
180 reg.enable_bit = bit;
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| /linux-master/drivers/tty/serial/ |
| H A D | msm_serial.c | 167 u32 enable_bit; member in struct:msm_dma
265 val &= ~dma->enable_bit;
330 dma->enable_bit = UARTDM_DMEN_TX_DM_ENABLE;
332 dma->enable_bit = UARTDM_DMEN_TX_BAM_ENABLE;
382 dma->enable_bit = UARTDM_DMEN_RX_DM_ENABLE;
384 dma->enable_bit = UARTDM_DMEN_RX_BAM_ENABLE;
459 val &= ~dma->enable_bit;
526 val |= dma->enable_bit;
560 val &= ~dma->enable_bit;
659 val |= dma->enable_bit;
[all...] |
| /linux-master/drivers/clk/bcm/ |
| H A D | clk-kona.c | 264 u32 enable_bit; local
273 enable_bit = enable->bit;
274 ret = __ccu_wait_bit(ccu, offset, enable_bit, false);
282 __ccu_write(ccu, offset, (u32)1 << enable_bit);
285 ret = __ccu_wait_bit(ccu, offset, enable_bit, false);
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| /linux-master/include/linux/clk/ |
| H A D | ti.h | 157 * @enable_reg: register to write to enable the clock (see @enable_bit)
158 * @enable_bit: bitshift to write to enable/disable the clock (see @enable_reg)
172 u8 enable_bit; member in struct:clk_hw_omap
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| /linux-master/drivers/perf/ |
| H A D | xgene_pmu.c | 1463 int enable_bit; local
1501 enable_bit = 0;
1503 enable_bit = (int) obj->integer.value;
1505 ctx->name = xgene_pmu_dev_name(dev, type, enable_bit);
1513 inf->enable_mask = 1 << enable_bit;
1630 int enable_bit; local
1648 if (of_property_read_u32(np, "enable-bit-index", &enable_bit))
1649 enable_bit = 0;
1651 ctx->name = xgene_pmu_dev_name(dev, type, enable_bit);
1660 inf->enable_mask = 1 << enable_bit;
[all...] |
| /linux-master/arch/arm/mach-ep93xx/ |
| H A D | clock.c | 426 u8 enable_bit,
447 psc->bit_idx = enable_bit;
423 clk_hw_register_div(const char *name, const char *parent_name, void __iomem *reg, u8 enable_bit, u8 shift, u8 width, char *clk_divisors, u8 num_div) argument
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| /linux-master/drivers/iio/imu/bmi160/ |
| H A D | bmi160_core.c | 627 unsigned int enable_bit = 0; local
630 enable_bit = BMI160_DRDY_INT_EN;
633 BMI160_DRDY_INT_EN, enable_bit,
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