Searched refs:clock (Results 26 - 50 of 1865) sorted by relevance

1234567891011>>

/linux-master/arch/mips/ath79/
H A DMakefile9 obj-y := prom.o setup.o common.o clock.o
/linux-master/drivers/clk/sunxi-ng/
H A Dccu-sun6i-rtc.h6 #include <dt-bindings/clock/sun6i-rtc.h>
H A Dccu-sun8i-r.h9 #include <dt-bindings/clock/sun8i-r-ccu.h>
H A Dccu-sun9i-a80-usb.h11 #include <dt-bindings/clock/sun9i-a80-usb.h>
H A Dccu-sun20i-d1.h10 #include <dt-bindings/clock/sun20i-d1-ccu.h>
/linux-master/arch/arm/vdso/
H A Dvgettimeofday.c13 int __vdso_clock_gettime(clockid_t clock, argument
16 return __cvdso_clock_gettime32(clock, ts);
19 int __vdso_clock_gettime64(clockid_t clock, argument
22 return __cvdso_clock_gettime(clock, ts);
/linux-master/sound/pci/echoaudio/
H A Dindigo_express_dsp.c31 u32 clock, control_reg, old_control_reg; local
41 clock = INDIGO_EXPRESS_32000;
44 clock = INDIGO_EXPRESS_44100;
47 clock = INDIGO_EXPRESS_48000;
50 clock = INDIGO_EXPRESS_32000|INDIGO_EXPRESS_DOUBLE_SPEED;
53 clock = INDIGO_EXPRESS_44100|INDIGO_EXPRESS_DOUBLE_SPEED;
56 clock = INDIGO_EXPRESS_48000|INDIGO_EXPRESS_DOUBLE_SPEED;
62 control_reg |= clock;
65 "set_sample_rate: %d clock %d\n", rate, clock);
[all...]
/linux-master/sound/pci/lola/
H A Dlola_clock.c89 chip->clock.cur_freq))
123 dev_dbg(chip->card->dev, "No valid clock widget\n");
127 chip->clock.nid = nid;
128 chip->clock.items = val & 0xff;
130 chip->clock.items);
131 if (chip->clock.items > MAX_SAMPLE_CLOCK_COUNT) {
133 chip->clock.items);
137 nitems = chip->clock.items;
167 chip->clock.cur_index = idx_list;
168 chip->clock
[all...]
/linux-master/drivers/video/fbdev/via/
H A Dvia_clock.c8 * clock and PLL management functions
260 printk(KERN_INFO "Using undocumented set clock state.\n%s", via_slap);
265 printk(KERN_INFO "Using undocumented set clock source.\n%s", via_slap);
282 void via_clock_init(struct via_clock *clock, int gfx_chip) argument
287 clock->set_primary_clock_state = dummy_set_clock_state;
288 clock->set_primary_clock_source = dummy_set_clock_source;
289 clock->set_primary_pll_state = dummy_set_pll_state;
290 clock->set_primary_pll = cle266_set_primary_pll;
292 clock->set_secondary_clock_state = dummy_set_clock_state;
293 clock
[all...]
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_afmt.c51 static void amdgpu_afmt_calc_cts(uint32_t clock, int *CTS, int *N, int freq) argument
58 cts = clock * 1000;
88 struct amdgpu_afmt_acr amdgpu_afmt_acr(uint32_t clock) argument
95 if (amdgpu_afmt_predefined_acr[i].clock == clock)
100 amdgpu_afmt_calc_cts(clock, &res.cts_32khz, &res.n_32khz, 32000);
101 amdgpu_afmt_calc_cts(clock, &res.cts_44_1khz, &res.n_44_1khz, 44100);
102 amdgpu_afmt_calc_cts(clock, &res.cts_48khz, &res.n_48khz, 48000);
/linux-master/arch/s390/kernel/vdso64/
H A Dvdso.h11 int __s390_vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts);
12 int __s390_vdso_clock_getres(clockid_t clock, struct __kernel_timespec *ts);
/linux-master/drivers/clk/xilinx/
H A DMakefile3 obj-$(CONFIG_COMMON_CLK_XLNX_CLKWZRD) += clk-xlnx-clock-wizard.o
/linux-master/arch/loongarch/vdso/
H A Dvgettimeofday.c10 int __vdso_clock_gettime(clockid_t clock, struct __kernel_timespec *ts) argument
12 return __cvdso_clock_gettime(clock, ts);
/linux-master/drivers/md/dm-vdo/
H A Dtime-utils.h18 static inline ktime_t current_time_ns(clockid_t clock) argument
20 return clock == CLOCK_MONOTONIC ? ktime_get_ns() : ktime_get_real_ns();
/linux-master/drivers/soc/fsl/qe/
H A Ducc.c118 int ucc_set_qe_mux_rxtx(unsigned int ucc_num, enum qe_clock clock, argument
138 switch (clock) {
153 switch (clock) {
168 switch (clock) {
184 switch (clock) {
202 /* Check for invalid combination of clock and UCC number */
215 static int ucc_get_tdm_common_clk(u32 tdm_num, enum qe_clock clock) argument
221 * clock source BRG3,4 and CLK1,2
223 * clock source BRG12,13 and CLK23,24
230 switch (clock) {
275 ucc_get_tdm_rx_clk(u32 tdm_num, enum qe_clock clock) argument
381 ucc_get_tdm_tx_clk(u32 tdm_num, enum qe_clock clock) argument
488 ucc_get_tdm_rxtx_clk(enum comm_dir mode, u32 tdm_num, enum qe_clock clock) argument
516 ucc_set_tdm_rxtx_clk(u32 tdm_num, enum qe_clock clock, enum comm_dir mode) argument
548 ucc_get_tdm_sync_source(u32 tdm_num, enum qe_clock clock, enum comm_dir mode) argument
630 ucc_set_tdm_rxtx_sync(u32 tdm_num, enum qe_clock clock, enum comm_dir mode) argument
[all...]
/linux-master/drivers/net/ethernet/mellanox/mlx5/core/lib/
H A Dclock.c40 #include "clock.h"
120 struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info); local
123 mdev = container_of(clock, struct mlx5_core_dev, clock);
132 s64 max = mlx5_ptp_getmaxphase(&mdev->clock.ptp_info);
180 struct mlx5_clock *clock = container_of(timer, struct mlx5_clock, timer); local
181 struct mlx5_core_dev *mdev = container_of(clock, struct mlx5_core_dev,
182 clock);
190 struct mlx5_clock *clock = &mdev->clock; local
215 struct mlx5_clock *clock = container_of(pps_info, struct mlx5_clock, local
245 struct mlx5_clock *clock; local
282 struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info); local
319 struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info); local
363 struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info); local
387 struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info); local
417 struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, ptp_info); local
447 struct mlx5_clock *clock = local
507 struct mlx5_clock *clock = &mdev->clock; local
632 struct mlx5_clock *clock = local
708 struct mlx5_clock *clock = local
740 struct mlx5_clock *clock = container_of(ptp, struct mlx5_clock, local
787 mlx5_get_pps_pin_mode(struct mlx5_clock *clock, u8 pin) argument
809 mlx5_init_pin_config(struct mlx5_clock *clock) argument
838 struct mlx5_clock *clock = &mdev->clock; local
873 perout_conf_next_event_timer(struct mlx5_core_dev *mdev, struct mlx5_clock *clock) argument
889 struct mlx5_clock *clock = mlx5_nb_cof(nb, struct mlx5_clock, pps_nb); local
934 struct mlx5_clock *clock = &mdev->clock; local
950 mlx5_init_overflow_period(struct mlx5_clock *clock) argument
987 struct mlx5_clock *clock = &mdev->clock; local
1010 struct mlx5_clock *clock = &mdev->clock; local
1029 struct mlx5_clock *clock = &mdev->clock; local
1051 struct mlx5_clock *clock = &mdev->clock; local
1062 struct mlx5_clock *clock = &mdev->clock; local
1092 struct mlx5_clock *clock = &mdev->clock; local
[all...]
H A Dclock.h62 return mdev->clock.ptp ? ptp_clock_index(mdev->clock.ptp) : -1;
65 static inline ktime_t mlx5_timecounter_cyc2time(struct mlx5_clock *clock, argument
68 struct mlx5_timer *timer = &clock->timer;
73 seq = read_seqbegin(&clock->lock);
75 } while (read_seqretry(&clock->lock, seq));
82 static inline ktime_t mlx5_real_time_cyc2time(struct mlx5_clock *clock, argument
97 static inline ktime_t mlx5_timecounter_cyc2time(struct mlx5_clock *clock, argument
103 static inline ktime_t mlx5_real_time_cyc2time(struct mlx5_clock *clock, argument
/linux-master/fs/bcachefs/
H A Dclock.h15 struct io_clock *clock = &c->io_clock[rw]; local
17 if (unlikely(this_cpu_add_return(*clock->pcpu_buf, sectors) >=
19 __bch2_increment_clock(clock, this_cpu_xchg(*clock->pcpu_buf, 0));
24 #define bch2_kthread_wait_event_ioclock_timeout(condition, clock, timeout)\
/linux-master/arch/sh/kernel/cpu/sh2a/
H A DMakefile12 obj-$(CONFIG_CPU_SUBTYPE_SH7201) += setup-sh7201.o clock-sh7201.o
13 obj-$(CONFIG_CPU_SUBTYPE_SH7203) += setup-sh7203.o clock-sh7203.o
14 obj-$(CONFIG_CPU_SUBTYPE_SH7263) += setup-sh7203.o clock-sh7203.o
15 obj-$(CONFIG_CPU_SUBTYPE_SH7264) += setup-sh7264.o clock-sh7264.o
16 obj-$(CONFIG_CPU_SUBTYPE_SH7206) += setup-sh7206.o clock-sh7206.o
17 obj-$(CONFIG_CPU_SUBTYPE_SH7269) += setup-sh7269.o clock-sh7269.o
18 obj-$(CONFIG_CPU_SUBTYPE_MXG) += setup-mxg.o clock-sh7206.o
/linux-master/drivers/clocksource/
H A Dclps711x-timer.c30 static void __init clps711x_clksrc_init(struct clk *clock, void __iomem *base) argument
32 unsigned long rate = clk_get_rate(clock);
51 static int __init _clps711x_clkevt_init(struct clk *clock, void __iomem *base, argument
61 rate = clk_get_rate(clock);
79 struct clk *clock = of_clk_get(np, 0); local
86 if (IS_ERR(clock))
87 return PTR_ERR(clock);
91 clps711x_clksrc_init(clock, base);
94 return _clps711x_clkevt_init(clock, base, irq);
/linux-master/drivers/gpu/drm/gma500/
H A Dgma_device.c13 uint32_t clock; local
24 pci_read_config_dword(pci_root, 0xD4, &clock);
27 switch (clock & 0x07) {
/linux-master/drivers/platform/x86/intel/int3472/
H A Dclk_and_regulator.c71 * We're just turning a GPIO on to enable the clock, which operation
130 if (int3472->clock.cl)
134 return 0; /* DSM clock control is not available */
140 int3472->clock.frequency = skl_int3472_get_clk_frequency(int3472);
141 int3472->clock.clk_hw.init = &init;
142 int3472->clock.clk = clk_register(&adev->dev, &int3472->clock.clk_hw);
143 if (IS_ERR(int3472->clock.clk)) {
144 ret = PTR_ERR(int3472->clock.clk);
148 int3472->clock
[all...]
/linux-master/include/dt-bindings/clock/
H A Dr7s9210-cpg-mssr.h10 #include <dt-bindings/clock/renesas-cpg-mssr.h>
/linux-master/scripts/dtc/include-prefixes/dt-bindings/clock/
H A Dr7s9210-cpg-mssr.h10 #include <dt-bindings/clock/renesas-cpg-mssr.h>
/linux-master/arch/sh/kernel/cpu/
H A DMakefile19 obj-$(CONFIG_SH_CLK_CPG_LEGACY) += clock-cpg.o
21 obj-y += irq/ init.o clock.o fpu.o pfc.o proc.o

Completed in 214 milliseconds

1234567891011>>