Searched refs:c7 (Results 26 - 50 of 64) sorted by relevance

123

/linux-master/arch/arm/mm/
H A Dproc-xscale.S92 1: mcr p15, 0, \rd, c7, c2, 5 @ allocate D cache line
94 mcr p15, 0, \rd, c7, c2, 5 @ allocate D cache line
96 mcr p15, 0, \rd, c7, c2, 5 @ allocate D cache line
98 mcr p15, 0, \rd, c7, c2, 5 @ allocate D cache line
159 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches & BTB
163 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
182 mcr p14, 0, r0, c7, c0, 0 @ Go to IDLE
195 mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
218 mcrne p15, 0, ip, c7, c
[all...]
H A Dproc-sa1100.S76 mcr p15, 0, ip, c7, c7, 0 @ invalidate I,D caches
77 mcr p15, 0, ip, c7, c10, 4 @ drain WB
79 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
131 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
154 mcr p15, 0, ip, c8, c7, 0 @ invalidate I & D TLBs
171 mcr p15, 0, r0, c7, c10, 1 @ clean D entry
172 mcr p15, 0, r0, c7, c10, 4 @ drain WB
192 mcr p15, 0, ip, c8, c7, 0 @ flush I+D TLBs
193 mcr p15, 0, ip, c7, c
[all...]
H A Dproc-v6.S66 mcr p15, 0, r1, c7, c5, 4 @ ISB
80 mcr p15, 0, r1, c7, c10, 4 @ DWB - WFI may enter a low-power mode
81 mcr p15, 0, r1, c7, c0, 4 @ wait for interrupt
86 1: mcr p15, 0, r0, c7, c10, 1 @ clean D entry
109 mcr p15, 0, r2, c7, c5, 6 @ flush BTAC/BTB
110 mcr p15, 0, r2, c7, c10, 4 @ drain write buffer
162 mcr p15, 0, ip, c7, c14, 0 @ clean+invalidate D cache
163 mcr p15, 0, ip, c7, c5, 0 @ invalidate I cache
164 mcr p15, 0, ip, c7, c15, 0 @ clean+invalidate cache
165 mcr p15, 0, ip, c7, c1
[all...]
H A Dcache-v7.S64 mcr p15, 0, ip, c7, c6, 2
86 ALT_SMP(mcr p15, 0, r0, c7, c1, 0) @ invalidate I-cache inner shareable
87 ALT_UP(mcr p15, 0, r0, c7, c5, 0) @ I+BTB cache invalidate
166 mcr p15, 0, r5, c7, c14, 2 @ clean & invalidate by set/way
201 ALT_SMP(mcr p15, 0, r0, c7, c1, 0) @ invalidate I-cache inner shareable
202 ALT_UP(mcr p15, 0, r0, c7, c5, 0) @ I+BTB cache invalidate
217 ALT_SMP(mcr p15, 0, r0, c7, c1, 0) @ invalidate I-cache inner shareable
218 ALT_UP(mcr p15, 0, r0, c7, c5, 0) @ I+BTB cache invalidate
292 USER( mcr p15, 0, r12, c7, c11, 1 ) @ clean D line to the point of unification
306 USER( mcr p15, 0, r12, c7, c
[all...]
H A Dtlb-v4wb.S37 mcr p15, 0, r3, c7, c10, 4 @ drain WB
60 mcr p15, 0, r3, c7, c10, 4 @ drain WB
H A Dtlb-v4wbi.S36 mcr p15, 0, r3, c7, c10, 4 @ drain WB
51 mcr p15, 0, r3, c7, c10, 4 @ drain WB
H A Dtlb-v4.S39 1: mcr p15, 0, r0, c8, c7, 1 @ invalidate TLB entry
H A Dtlb-v7.S54 ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA
83 ALT_UP(mcr p15, 0, r0, c8, c7, 1) @ TLB invalidate U MVA
H A Dpv-fixup-asm.S75 mcr p15, 0, ip, c7, c5, 0 @ I+BTB cache invalidate
76 mcr p15, 0, ip, c8, c7, 0 @ local_flush_tlb_all()
H A Dproc-arm740.S63 mcr p15, 0, ip, c7, c0, 0 @ invalidate cache
74 mcr p15, 0, r0, c7, c0, 0 @ invalidate caches
80 mcr p15, 0, r0, c6, c7
H A Dproc-v7-3level.S87 ALT_UP (mcr p15, 0, r0, c7, c10, 1) @ flush_pte
H A Dproc-v7-2level.S106 ALT_UP (mcr p15, 0, r0, c7, c10, 1) @ flush_pte
/linux-master/arch/arm/include/asm/hardware/
H A Dcp14.h49 #define RCP14_DBGVCR() MRC14(0, c0, c7, 0)
64 #define RCP14_DBGBVR7() MRC14(0, c0, c7, 4)
80 #define RCP14_DBGBCR7() MRC14(0, c0, c7, 5)
96 #define RCP14_DBGWVR7() MRC14(0, c0, c7, 6)
112 #define RCP14_DBGWCR7() MRC14(0, c0, c7, 7)
129 #define RCP14_DBGBXVR7() MRC14(0, c1, c7, 1)
144 #define RCP14_DBGITCTRL() MRC14(0, c7, c0, 4)
145 #define RCP14_DBGCLAIMSET() MRC14(0, c7, c8, 6)
146 #define RCP14_DBGCLAIMCLR() MRC14(0, c7, c9, 6)
147 #define RCP14_DBGAUTHSTATUS() MRC14(0, c7, c1
[all...]
/linux-master/arch/arm/boot/compressed/
H A Dhead-sa1100.S37 mcr p15, 0, r0, c7, c10, 4 @ drain WB
38 mcr p15, 0, r0, c7, c7, 0 @ flush I & D caches
H A Dhead.S731 mcr p15, 0, r0, c6, c7, 0 @ PR7 Area Setting
732 mcr p15, 0, r0, c6, c7, 1
744 mcr p15, 0, r0, c7, c10, 4 @ drain write buffer
745 mcr p15, 0, r0, c7, c5, 0 @ flush(inval) I-Cache
746 mcr p15, 0, r0, c7, c6, 0 @ flush(inval) D-Cache
755 mcr p15, 0, r0, c7, c5, 0 @ flush(inval) I-Cache
756 mcr p15, 0, r0, c7, c6, 0 @ flush(inval) D-Cache
761 mcr p15, 0, r0, c6, c7, 0 @ PR7 Area Setting
771 mcr p15, 0, r0, c7, c0, 0 @ invalidate whole cache v3
784 mcr p15, 0, r0, c7, c
[all...]
/linux-master/arch/arm/mach-omap2/
H A Dsleep24xx.S55 mcr p15, 0, r3, c7, c10, 4 @ memory barrier, hope SDR/DDR finished
63 mcr p15, 0, r3, c7, c0, 4 @ wait for interrupt
H A Domap-smc.S50 mcr p15, 0, r7, c7, c5, 6
/linux-master/tools/perf/arch/s390/include/
H A Ddwarf-regs-table.h37 REG_DWARFNUM_NAME(c7, 39),
/linux-master/arch/arm/mach-pxa/
H A Dstandby.S27 1: mcr p14, 0, r2, c7, c0, 0 @ put the system into Standby
61 mcr p14, 0, r0, c7, c0, 0
H A Dsleep.S32 mcr p14, 0, r0, c7, c0, 0 @ enter sleep
170 mcr p14, 0, r1, c7, c0, 0 @ PWRMODE
/linux-master/arch/arm/mach-omap1/
H A Dsleep.S122 mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt
148 mcr p15, 0, r0, c7, c10, 4
188 mcr p15, 0, r2, c7, c0, 4 @ wait for interrupt
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/sec/fuc/
H A Dg98.fuc0s447 ckeyreg $c7
531 ckexp $c7 $c7
547 ckexp $c7 $c7
566 ckexp $c7 $c7
/linux-master/arch/arm/include/asm/
H A Dassembler.h117 mcr p15, 0, r0, c7, c10, 4
121 mcr p15, 0, r0, c7, c5, 4
370 mcr p15, 0, r0, c7, c5, 4
386 ALT_SMP(mcr p15, 0, r0, c7, c10, 5) @ dmb
409 mcr p15, 0, r0, c7, c10, 5 @ dmb
116 mcr p15, 0, r0, c7, c10, 4 variable
120 mcr p15, 0, r0, c7, c5, 4 variable
/linux-master/arch/powerpc/crypto/
H A Daes-tab-4k.S57 .long R(08, 04, 04, 0c), R(95, c7, c7, 52)
109 .long R(8c, 46, 46, ca), R(c7, ee, ee, 29)
132 .long R(73, b4, b4, c7), R(97, c6, c6, 51)
226 .long R(0e, 09, 0d, 0b), R(f2, 8b, c7, ad)
237 .long R(ae, f9, 32, 11), R(c7, 29, a1, 6d)
244 .long R(87, 49, 4e, c7), R(d9, 38, d1, c1)
281 .long R(18, 14, ce, 79), R(73, c7, 37, bf)
/linux-master/arch/arm/mach-imx/
H A Dsuspend-imx6.S312 mcr p15, 0, r6, c7, c5, 0
313 mcr p15, 0, r6, c7, c5, 6

Completed in 426 milliseconds

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