Searched refs:bank (Results 26 - 50 of 367) sorted by relevance

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/linux-master/drivers/pinctrl/samsung/
H A Dpinctrl-samsung.c352 * given a pin number that is local to a pin controller, find out the pin bank
353 * and the register base of the pin bank.
357 struct samsung_pin_bank **bank)
369 if (bank)
370 *bank = b;
379 struct samsung_pin_bank *bank; local
390 pin_to_reg_bank(drvdata, grp->pins[0], &reg, &pin_offset, &bank);
391 type = bank->type;
400 raw_spin_lock_irqsave(&bank->slock, flags);
407 raw_spin_unlock_irqrestore(&bank
355 pin_to_reg_bank(struct samsung_pinctrl_drv_data *drvdata, unsigned pin, void __iomem **reg, u32 *offset, struct samsung_pin_bank **bank) argument
433 struct samsung_pin_bank *bank; local
540 struct samsung_pin_bank *bank = gpiochip_get_data(gc); local
557 struct samsung_pin_bank *bank = gpiochip_get_data(gc); local
570 struct samsung_pin_bank *bank = gpiochip_get_data(gc); local
591 struct samsung_pin_bank *bank; local
621 struct samsung_pin_bank *bank = gpiochip_get_data(gc); local
635 struct samsung_pin_bank *bank = gpiochip_get_data(gc); local
653 struct samsung_pin_bank *bank = gpiochip_get_data(gc); local
666 struct samsung_pin_bank *bank = gpiochip_get_data(gc); local
872 int pin, bank, ret; local
933 struct samsung_pin_bank *bank = drvdata->pin_banks; local
958 struct samsung_pin_bank *bank = drvdata->pin_banks; local
1008 struct samsung_pin_bank *bank; local
1023 struct samsung_pin_bank *bank; local
1065 struct samsung_pin_bank *bank; local
1206 struct samsung_pin_bank *bank = &drvdata->pin_banks[i]; local
1259 struct samsung_pin_bank *bank = &drvdata->pin_banks[i]; local
[all...]
H A Dpinctrl-s3c64xx.c209 * @bank: pin bank related to the domain
213 struct samsung_pin_bank *bank; member in struct:s3c64xx_eint0_domain_data
268 struct samsung_pin_bank *bank, int pin)
270 const struct samsung_pin_bank_type *bank_type = bank->type;
278 reg = d->virt_base + bank->pctl_offset;
281 /* 4-bit bank type with 2 con regs */
289 raw_spin_lock_irqsave(&bank->slock, flags);
293 val |= bank->eint_func << shift;
296 raw_spin_unlock_irqrestore(&bank
267 s3c64xx_irq_set_function(struct samsung_pinctrl_drv_data *d, struct samsung_pin_bank *bank, int pin) argument
305 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local
331 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local
341 struct samsung_pin_bank *bank = irq_data_get_irq_chip_data(irqd); local
385 struct samsung_pin_bank *bank = h->host_data; local
452 struct samsung_pin_bank *bank; local
547 struct samsung_pin_bank *bank = ddata->bank; local
655 struct samsung_pin_bank *bank = ddata->bank; local
690 struct samsung_pin_bank *bank; local
[all...]
/linux-master/include/linux/mfd/
H A Dabx500.h26 u8 bank; member in struct:abx500_init_settings
31 int abx500_set_register_interruptible(struct device *dev, u8 bank, u8 reg,
33 int abx500_get_register_interruptible(struct device *dev, u8 bank, u8 reg,
35 int abx500_get_register_page_interruptible(struct device *dev, u8 bank,
37 int abx500_set_register_page_interruptible(struct device *dev, u8 bank,
44 * @bank: The i2c bank number.
51 int abx500_mask_and_set_register_interruptible(struct device *dev, u8 bank,
/linux-master/drivers/clk/rockchip/
H A Dsoftrst.c29 int bank, offset; local
34 bank = id / softrst->num_per_reg;
39 softrst->reg_base + (bank * 4));
46 reg = readl(softrst->reg_base + (bank * 4));
47 writel(reg | BIT(offset), softrst->reg_base + (bank * 4));
61 int bank, offset; local
66 bank = id / softrst->num_per_reg;
70 writel((BIT(offset) << 16), softrst->reg_base + (bank * 4));
77 reg = readl(softrst->reg_base + (bank * 4));
78 writel(reg & ~BIT(offset), softrst->reg_base + (bank *
[all...]
/linux-master/drivers/pinctrl/meson/
H A Dpinctrl-meson-axg-pmx.c30 struct meson_pmx_bank **bank)
38 *bank = &pmx->pmx_banks[i];
45 static int meson_pmx_calc_reg_and_offset(struct meson_pmx_bank *bank, argument
51 shift = pin - bank->first;
53 *reg = bank->reg + (bank->offset + (shift << 2)) / 32;
54 *offset = (bank->offset + (shift << 2)) % 32;
65 struct meson_pmx_bank *bank; local
67 ret = meson_axg_pmx_get_bank(pc, pin, &bank);
71 meson_pmx_calc_reg_and_offset(bank, pi
28 meson_axg_pmx_get_bank(struct meson_pinctrl *pc, unsigned int pin, struct meson_pmx_bank **bank) argument
[all...]
/linux-master/arch/x86/kernel/cpu/mce/
H A Dinternal.h44 void mce_intel_handle_storm(int bank, bool on);
45 void cmci_disable_bank(int bank);
52 static inline void mce_intel_handle_storm(int bank, bool on) { } argument
53 static inline void cmci_disable_bank(int bank) { } argument
64 void cmci_storm_begin(unsigned int bank);
65 void cmci_storm_end(unsigned int bank);
67 void mce_inherit_storm(unsigned int bank);
71 static inline void cmci_storm_begin(unsigned int bank) {} argument
72 static inline void cmci_storm_end(unsigned int bank) {} argument
74 static inline void mce_inherit_storm(unsigned int bank) {} argument
315 mca_msr_reg(int bank, enum mca_msr reg) argument
[all...]
/linux-master/drivers/leds/
H A Dleds-tca6507.c62 * Each bank (BANK0 and BANK1) has two usage counts - LEDs using the
159 struct bank { struct in struct:tca6507_chip
164 } bank[3]; member in struct:tca6507_chip
175 int bank; /* Bank used, or -1 */ member in struct:tca6507_chip::tca6507_led
275 * bank or other. This can be used for timers, for levels, or for
278 static void set_code(struct tca6507_chip *tca, int reg, int bank, int new) argument
282 if (bank) {
295 static void set_level(struct tca6507_chip *tca, int bank, int level) argument
297 switch (bank) {
300 set_code(tca, TCA6507_MAX_INTENSITY, bank, leve
310 set_times(struct tca6507_chip *tca, int bank) argument
[all...]
/linux-master/drivers/reset/
H A Dreset-zynq.c34 int bank = id / BITS_PER_LONG; local
37 pr_debug("%s: %s reset bank %u offset %u\n", KBUILD_MODNAME, __func__,
38 bank, offset);
41 priv->offset + (bank * 4),
51 int bank = id / BITS_PER_LONG; local
54 pr_debug("%s: %s reset bank %u offset %u\n", KBUILD_MODNAME, __func__,
55 bank, offset);
58 priv->offset + (bank * 4),
68 int bank = id / BITS_PER_LONG; local
73 pr_debug("%s: %s reset bank
[all...]
/linux-master/drivers/hwspinlock/
H A Du8500_hsem.c88 struct hwspinlock_device *bank; local
108 bank = devm_kzalloc(&pdev->dev, struct_size(bank, lock, num_locks),
110 if (!bank)
113 platform_set_drvdata(pdev, bank);
115 for (i = 0, hwlock = &bank->lock[0]; i < num_locks; i++, hwlock++)
118 return devm_hwspin_lock_register(&pdev->dev, bank,
125 struct hwspinlock_device *bank = platform_get_drvdata(pdev); local
126 void __iomem *io_base = bank->lock[0].priv - HSEM_REGISTER_OFFSET;
H A Dhwspinlock_core.c133 ret = hwlock->bank->ops->trylock(hwlock);
241 if (hwlock->bank->ops->relax)
242 hwlock->bank->ops->relax(hwlock);
287 hwlock->bank->ops->unlock(hwlock);
315 * Returns: a relative index of the lock within a specified bank on success,
373 if (device_match_of_node(hwlock->bank->dev, args.np)) {
383 if (id < 0 || id >= hwlock->bank->num_locks) {
387 id += hwlock->bank->base_id;
477 * @bank: the hwspinlock device, which usually provides numerous hw locks
480 * @base_id: id of the first hardware spinlock in this bank
490 hwspin_lock_register(struct hwspinlock_device *bank, struct device *dev, const struct hwspinlock_ops *ops, int base_id, int num_locks) argument
538 hwspin_lock_unregister(struct hwspinlock_device *bank) argument
566 struct hwspinlock_device **bank = res; local
587 devm_hwspin_lock_unregister(struct device *dev, struct hwspinlock_device *bank) argument
616 devm_hwspin_lock_register(struct device *dev, struct hwspinlock_device *bank, const struct hwspinlock_ops *ops, int base_id, int num_locks) argument
[all...]
/linux-master/drivers/pinctrl/sunxi/
H A Dpinctrl-sunxi.h32 #define SUNXI_PINCTRL_PIN(bank, pin) \
33 PINCTRL_PIN(P ## bank ## _BASE + (pin), "P" #bank #pin)
226 static inline u32 sunxi_irq_hw_bank_num(const struct sunxi_pinctrl_desc *desc, u8 bank) argument
229 return bank;
231 return desc->irq_bank_map[bank];
237 u8 bank = irq / IRQ_PER_BANK; local
241 sunxi_irq_hw_bank_num(desc, bank) * IRQ_MEM_SIZE + reg;
250 static inline u32 sunxi_irq_ctrl_reg_from_bank(const struct sunxi_pinctrl_desc *desc, u8 bank) argument
252 return IRQ_CTRL_REG + sunxi_irq_hw_bank_num(desc, bank) * IRQ_MEM_SIZ
258 u8 bank = irq / IRQ_PER_BANK; local
269 sunxi_irq_debounce_reg_from_bank(const struct sunxi_pinctrl_desc *desc, u8 bank) argument
275 sunxi_irq_status_reg_from_bank(const struct sunxi_pinctrl_desc *desc, u8 bank) argument
284 u8 bank = irq / IRQ_PER_BANK; local
297 u8 bank = pin / PINS_PER_BANK; local
[all...]
/linux-master/drivers/crypto/intel/qat/qat_common/
H A Dadf_transport_internal.h19 struct adf_etr_bank_data *bank; member in struct:adf_etr_ring_data
39 spinlock_t lock; /* protects bank data struct */
53 int adf_bank_debugfs_add(struct adf_etr_bank_data *bank);
54 void adf_bank_debugfs_rm(struct adf_etr_bank_data *bank);
58 static inline int adf_bank_debugfs_add(struct adf_etr_bank_data *bank) argument
63 #define adf_bank_debugfs_rm(bank) do {} while (0)
H A Dadf_gen2_hw_data.c119 static u32 read_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring) argument
121 return READ_CSR_RING_HEAD(csr_base_addr, bank, ring);
124 static void write_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring, argument
127 WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value);
130 static u32 read_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring) argument
132 return READ_CSR_RING_TAIL(csr_base_addr, bank, ring);
135 static void write_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring, argument
138 WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value);
141 static u32 read_csr_e_stat(void __iomem *csr_base_addr, u32 bank) argument
143 return READ_CSR_E_STAT(csr_base_addr, bank);
146 write_csr_ring_config(void __iomem *csr_base_addr, u32 bank, u32 ring, u32 value) argument
152 write_csr_ring_base(void __iomem *csr_base_addr, u32 bank, u32 ring, dma_addr_t addr) argument
158 write_csr_int_flag(void __iomem *csr_base_addr, u32 bank, u32 value) argument
163 write_csr_int_srcsel(void __iomem *csr_base_addr, u32 bank) argument
168 write_csr_int_col_en(void __iomem *csr_base_addr, u32 bank, u32 value) argument
174 write_csr_int_col_ctl(void __iomem *csr_base_addr, u32 bank, u32 value) argument
180 write_csr_int_flag_and_col(void __iomem *csr_base_addr, u32 bank, u32 value) argument
186 write_csr_ring_srv_arb_en(void __iomem *csr_base_addr, u32 bank, u32 value) argument
[all...]
H A Dadf_gen4_hw_data.c16 static u32 read_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring) argument
18 return READ_CSR_RING_HEAD(csr_base_addr, bank, ring);
21 static void write_csr_ring_head(void __iomem *csr_base_addr, u32 bank, u32 ring, argument
24 WRITE_CSR_RING_HEAD(csr_base_addr, bank, ring, value);
27 static u32 read_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring) argument
29 return READ_CSR_RING_TAIL(csr_base_addr, bank, ring);
32 static void write_csr_ring_tail(void __iomem *csr_base_addr, u32 bank, u32 ring, argument
35 WRITE_CSR_RING_TAIL(csr_base_addr, bank, ring, value);
38 static u32 read_csr_e_stat(void __iomem *csr_base_addr, u32 bank) argument
40 return READ_CSR_E_STAT(csr_base_addr, bank);
43 write_csr_ring_config(void __iomem *csr_base_addr, u32 bank, u32 ring, u32 value) argument
49 write_csr_ring_base(void __iomem *csr_base_addr, u32 bank, u32 ring, dma_addr_t addr) argument
55 write_csr_int_flag(void __iomem *csr_base_addr, u32 bank, u32 value) argument
61 write_csr_int_srcsel(void __iomem *csr_base_addr, u32 bank) argument
66 write_csr_int_col_en(void __iomem *csr_base_addr, u32 bank, u32 value) argument
71 write_csr_int_col_ctl(void __iomem *csr_base_addr, u32 bank, u32 value) argument
77 write_csr_int_flag_and_col(void __iomem *csr_base_addr, u32 bank, u32 value) argument
83 write_csr_ring_srv_arb_en(void __iomem *csr_base_addr, u32 bank, u32 value) argument
[all...]
/linux-master/drivers/memory/
H A Djz4780-nemc.c65 * child device. Unique here means that a device that references the same bank
71 unsigned int bank, count = 0; local
76 bank = of_read_number(prop, 1);
77 if (!(referenced & BIT(bank))) {
78 referenced |= BIT(bank);
88 * jz4780_nemc_set_type() - set the type of device connected to a bank
90 * @bank: bank number to configure.
91 * @type: type of device connected to the bank.
93 void jz4780_nemc_set_type(struct device *dev, unsigned int bank, argument
125 jz4780_nemc_assert(struct device *dev, unsigned int bank, bool assert) argument
158 jz4780_nemc_configure_bank(struct jz4780_nemc *nemc, unsigned int bank, struct device_node *node) argument
277 unsigned int bank; local
[all...]
/linux-master/drivers/gpio/
H A Dgpio-aspeed-sgpio.c105 const struct aspeed_sgpio_bank *bank,
110 return gpio->base + bank->val_regs + GPIO_VAL_VALUE;
112 return gpio->base + bank->rdata_reg;
114 return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE;
116 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0;
118 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1;
120 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE2;
122 return gpio->base + bank->irq_regs + GPIO_IRQ_STATUS;
124 return gpio->base + bank->tolerance_regs;
137 unsigned int bank; local
104 bank_reg(struct aspeed_sgpio *gpio, const struct aspeed_sgpio_bank *bank, const enum aspeed_sgpio_reg reg) argument
172 const struct aspeed_sgpio_bank *bank = to_bank(offset); local
190 const struct aspeed_sgpio_bank *bank = to_bank(offset); local
252 irqd_to_aspeed_sgpio_data(struct irq_data *d, struct aspeed_sgpio **gpio, const struct aspeed_sgpio_bank **bank, u32 *bit, int *offset) argument
270 const struct aspeed_sgpio_bank *bank; local
290 const struct aspeed_sgpio_bank *bank; local
339 const struct aspeed_sgpio_bank *bank; local
404 const struct aspeed_sgpio_bank *bank = &aspeed_sgpio_banks[i]; local
417 const struct aspeed_sgpio_bank *bank; local
440 const struct aspeed_sgpio_bank *bank; local
[all...]
H A Dgpio-f7188x.c95 struct f7188x_gpio_bank *bank; member in struct:f7188x_gpio_data
291 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); local
292 struct f7188x_sio *sio = bank->data->sio;
300 dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase));
316 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); local
317 struct f7188x_sio *sio = bank->data->sio;
325 dir = superio_inb(sio->addr, f7188x_gpio_dir(bank->regbase));
331 superio_outb(sio->addr, f7188x_gpio_dir(bank->regbase), dir);
341 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); local
342 struct f7188x_sio *sio = bank
366 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); local
397 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); local
421 struct f7188x_gpio_bank *bank = gpiochip_get_data(chip); local
506 struct f7188x_gpio_bank *bank = &data->bank[i]; local
[all...]
H A Dgpio-aspeed.c34 unsigned int bank; member in struct:aspeed_bank_props
211 const struct aspeed_gpio_bank *bank,
216 return gpio->base + bank->val_regs + GPIO_VAL_VALUE;
218 return gpio->base + bank->rdata_reg;
220 return gpio->base + bank->val_regs + GPIO_VAL_DIR;
222 return gpio->base + bank->irq_regs + GPIO_IRQ_ENABLE;
224 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE0;
226 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE1;
228 return gpio->base + bank->irq_regs + GPIO_IRQ_TYPE2;
230 return gpio->base + bank
210 bank_reg(struct aspeed_gpio *gpio, const struct aspeed_gpio_bank *bank, const enum aspeed_gpio_reg reg) argument
255 unsigned int bank = GPIO_BANK(offset); local
283 const struct aspeed_gpio_bank *bank = to_bank(offset); local
307 aspeed_gpio_change_cmd_source(struct aspeed_gpio *gpio, const struct aspeed_gpio_bank *bank, int bindex, int cmdsrc) argument
342 const struct aspeed_gpio_bank *bank = to_bank(offset); local
366 const struct aspeed_gpio_bank *bank = to_bank(offset); local
386 const struct aspeed_gpio_bank *bank = to_bank(offset); local
395 const struct aspeed_gpio_bank *bank = to_bank(offset); local
431 const struct aspeed_gpio_bank *bank = to_bank(offset); local
459 const struct aspeed_gpio_bank *bank = to_bank(offset); local
487 const struct aspeed_gpio_bank *bank = to_bank(offset); local
506 irqd_to_aspeed_gpio_data(struct irq_data *d, struct aspeed_gpio **gpio, const struct aspeed_gpio_bank **bank, u32 *bit, int *offset) argument
530 const struct aspeed_gpio_bank *bank; local
556 const struct aspeed_gpio_bank *bank; local
609 const struct aspeed_gpio_bank *bank; local
682 const struct aspeed_gpio_bank *bank = &aspeed_gpio_banks[i]; local
833 const struct aspeed_gpio_bank *bank = to_bank(offset); local
1017 const struct aspeed_gpio_bank *bank = to_bank(offset); local
1063 const struct aspeed_gpio_bank *bank = to_bank(offset); local
1094 const struct aspeed_gpio_bank *bank; local
1231 const struct aspeed_gpio_bank *bank = &aspeed_gpio_banks[i]; local
[all...]
/linux-master/include/linux/
H A Dscx200_gpio.h11 #define __SCx200_GPIO_BANK unsigned bank = index>>5
12 #define __SCx200_GPIO_IOADDR unsigned short ioaddr = scx200_gpio_base+0x10*bank
13 #define __SCx200_GPIO_SHADOW unsigned long *shadow = scx200_gpio_shadow+bank
36 return (scx200_gpio_shadow[bank] & (1<<index)) ? 1 : 0;
/linux-master/include/soc/mediatek/
H A Dsmi.h25 unsigned char bank[32]; member in struct:mtk_smi_larb_iommu
/linux-master/drivers/pinctrl/
H A Dpinctrl-rockchip.c258 * given a pin number that is local to a pin controller, find out the pin bank
259 * and the register base of the pin bank.
657 static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin, argument
660 struct rockchip_pinctrl *info = bank->drvdata;
667 if (data->num == bank->bank_num &&
1017 static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin, argument
1020 struct rockchip_pinctrl *info = bank->drvdata;
1027 if ((data->bank_num == bank->bank_num) &&
1042 static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin) argument
1044 struct rockchip_pinctrl *info = bank
1119 rockchip_verify_mux(struct rockchip_pin_bank *bank, int pin, int mux) argument
1157 rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux) argument
1280 px30_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1312 px30_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1344 px30_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1375 rv1108_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1406 rv1108_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1438 rv1108_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1469 rv1126_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1506 rv1126_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1544 rv1126_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1579 rk3308_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1599 rk2928_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1617 rk3128_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1639 rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1676 rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1712 rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1744 rk3228_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1763 rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1782 rk3308_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1801 rk3308_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1821 rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1854 rk3368_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1888 rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1920 rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1949 rk3568_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
1982 rk3568_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
2117 rk3588_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
2142 rk3588_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
2167 rk3588_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
2198 rockchip_get_drive_perpin(struct rockchip_pin_bank *bank, int pin_num) argument
2277 rockchip_set_drive_perpin(struct rockchip_pin_bank *bank, int pin_num, int strength) argument
2403 rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num) argument
2459 rockchip_set_pull(struct rockchip_pin_bank *bank, int pin_num, int pull) argument
2541 rk3328_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
2564 rk3568_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank, int pin_num, struct regmap **regmap, int *reg, u8 *bit) argument
2587 rockchip_get_schmitt(struct rockchip_pin_bank *bank, int pin_num) argument
2615 rockchip_set_schmitt(struct rockchip_pin_bank *bank, int pin_num, int enable) argument
2687 struct rockchip_pin_bank *bank; local
2722 struct rockchip_pin_bank *bank; local
2766 rockchip_pinconf_defer_pin(struct rockchip_pin_bank *bank, unsigned int pin, u32 param, u32 arg) argument
2789 struct rockchip_pin_bank *bank = pin_to_bank(info, pin); local
2895 struct rockchip_pin_bank *bank = pin_to_bank(info, pin); local
2999 struct rockchip_pin_bank *bank; local
3141 int pin, bank, ret; local
3197 struct rockchip_pin_bank *bank; local
3435 struct rockchip_pin_bank *bank; local
[all...]
H A Dpinctrl-microchip-sgpio.c357 struct sgpio_bank *bank = pinctrl_dev_get_drvdata(pctldev); local
359 struct sgpio_priv *priv = bank->priv;
367 val = bank->is_input;
371 val = !bank->is_input;
375 if (bank->is_input)
392 struct sgpio_bank *bank = pinctrl_dev_get_drvdata(pctldev); local
393 struct sgpio_priv *priv = bank->priv;
406 if (bank->is_input)
458 struct sgpio_bank *bank = pinctrl_dev_get_drvdata(pctldev); local
460 return (input == bank
467 struct sgpio_bank *bank = pinctrl_dev_get_drvdata(pctldev); local
493 struct sgpio_bank *bank = pinctrl_dev_get_drvdata(pctldev); local
501 struct sgpio_bank *bank = pinctrl_dev_get_drvdata(pctldev); local
511 struct sgpio_bank *bank = pinctrl_dev_get_drvdata(pctldev); local
529 struct sgpio_bank *bank = gpiochip_get_data(gc); local
538 struct sgpio_bank *bank = gpiochip_get_data(gc); local
553 struct sgpio_bank *bank = gpiochip_get_data(gc); local
566 struct sgpio_bank *bank = gpiochip_get_data(gc); local
579 struct sgpio_bank *bank = gpiochip_get_data(gc); local
645 struct sgpio_bank *bank = gpiochip_get_data(chip); local
680 struct sgpio_bank *bank = gpiochip_get_data(chip); local
711 struct sgpio_bank *bank = gpiochip_get_data(chip); local
764 struct sgpio_bank *bank = gpiochip_get_data(chip); local
793 struct sgpio_bank *bank; local
[all...]
H A Dpinctrl-at91-pio4.c34 * designed the pin id into this bank.
82 * @last_bank_count: number of lines in the last bank (can be less than
101 unsigned int bank; member in struct:atmel_pin
115 * @pins: pins table used for both pinctrl and gpio. pin_id, bank and line
121 * @irqs: table containing the hw irq number of the bank. The index of the
122 * table is the bank id.
162 unsigned int bank, unsigned int reg)
165 + ATMEL_PIO_BANK_OFFSET * bank + reg);
169 unsigned int bank, unsigned int reg,
173 + ATMEL_PIO_BANK_OFFSET * bank
161 atmel_gpio_read(struct atmel_pioctrl *atmel_pioctrl, unsigned int bank, unsigned int reg) argument
168 atmel_gpio_write(struct atmel_pioctrl *atmel_pioctrl, unsigned int bank, unsigned int reg, unsigned int val) argument
247 int bank = ATMEL_PIO_BANK(d->hwirq); local
283 int n, bank = -1; local
349 unsigned int bank; local
407 unsigned int bank; local
452 unsigned int bank = atmel_pioctrl->pins[pin_id]->bank; local
468 unsigned int bank = atmel_pioctrl->pins[pin_id]->bank; local
804 unsigned int bank, pin, pin_id = grp->pin; local
1146 unsigned int bank = ATMEL_PIO_BANK(i); local
[all...]
/linux-master/drivers/ras/amd/atl/
H A Dumc.c74 struct xor_bits bank[NUM_BANK_BITS]; member in struct:__anon1585
114 addr_hash.bank[i].xor_enable = FIELD_GET(ADDR_HASH_XOR_EN, temp);
115 addr_hash.bank[i].col_xor = FIELD_GET(ADDR_HASH_COL_XOR, temp);
116 addr_hash.bank[i].row_xor = FIELD_GET(ADDR_HASH_ROW_XOR, temp);
141 * The DRAM address includes bank, row, and column. Also included are bits for
172 u16 i, col, row, bank, pc, sid, temp; local
175 bank = FIELD_GET(MI300_UMC_MCA_BANK, addr);
182 if (!addr_hash.bank[i].xor_enable)
185 temp = bitwise_xor_bits(col & addr_hash.bank[i].col_xor);
186 temp ^= bitwise_xor_bits(row & addr_hash.bank[
[all...]
/linux-master/drivers/mtd/nand/raw/
H A Ddenali.h18 #define DEVICE_RESET__BANK(bank) BIT(bank)
36 #define RB_PIN_ENABLED__BANK(bank) BIT(bank)
208 #define INTR_STATUS(bank) (0x410 + (bank) * 0x50)
209 #define INTR_EN(bank) (0x420 + (bank) * 0x50)
230 #define PAGE_CNT(bank) (0x430 + (bank) *
308 int bank; member in struct:denali_chip_sel
[all...]

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