Lines Matching refs:bank
258 * given a pin number that is local to a pin controller, find out the pin bank
259 * and the register base of the pin bank.
657 static void rockchip_get_recalced_mux(struct rockchip_pin_bank *bank, int pin,
660 struct rockchip_pinctrl *info = bank->drvdata;
667 if (data->num == bank->bank_num &&
1017 static bool rockchip_get_mux_route(struct rockchip_pin_bank *bank, int pin,
1020 struct rockchip_pinctrl *info = bank->drvdata;
1027 if ((data->bank_num == bank->bank_num) &&
1042 static int rockchip_get_mux(struct rockchip_pin_bank *bank, int pin)
1044 struct rockchip_pinctrl *info = bank->drvdata;
1055 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) {
1060 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)
1063 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
1065 else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU)
1071 mux_type = bank->iomux[iomux_num].type;
1072 reg = bank->iomux[iomux_num].offset;
1088 if (bank->recalced_mask & BIT(pin))
1089 rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask);
1092 if (bank->bank_num == 0) {
1107 } else if (bank->bank_num > 0) {
1119 static int rockchip_verify_mux(struct rockchip_pin_bank *bank,
1122 struct rockchip_pinctrl *info = bank->drvdata;
1129 if (bank->iomux[iomux_num].type & IOMUX_UNROUTED) {
1134 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY) {
1153 * @bank: pin bank to change
1157 static int rockchip_set_mux(struct rockchip_pin_bank *bank, int pin, int mux)
1159 struct rockchip_pinctrl *info = bank->drvdata;
1168 ret = rockchip_verify_mux(bank, pin, mux);
1172 if (bank->iomux[iomux_num].type & IOMUX_GPIO_ONLY)
1175 dev_dbg(dev, "setting mux of GPIO%d-%d to %d\n", bank->bank_num, pin, mux);
1177 if (bank->iomux[iomux_num].type & IOMUX_SOURCE_PMU)
1179 else if (bank->iomux[iomux_num].type & IOMUX_L_SOURCE_PMU)
1185 mux_type = bank->iomux[iomux_num].type;
1186 reg = bank->iomux[iomux_num].offset;
1202 if (bank->recalced_mask & BIT(pin))
1203 rockchip_get_recalced_mux(bank, pin, ®, &bit, &mask);
1206 if (bank->bank_num == 0) {
1237 } else if (bank->bank_num > 0) {
1245 if (bank->route_mask & BIT(pin)) {
1246 if (rockchip_get_mux_route(bank, pin, mux, &route_location,
1280 static int px30_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
1284 struct rockchip_pinctrl *info = bank->drvdata;
1286 /* The first 32 pins of the first bank are located in PMU */
1287 if (bank->bank_num == 0) {
1294 /* correct the offset, as we're starting with the 2nd bank */
1296 *reg += bank->bank_num * PX30_PULL_BANK_STRIDE;
1312 static int px30_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
1316 struct rockchip_pinctrl *info = bank->drvdata;
1318 /* The first 32 pins of the first bank are located in PMU */
1319 if (bank->bank_num == 0) {
1326 /* correct the offset, as we're starting with the 2nd bank */
1328 *reg += bank->bank_num * PX30_DRV_BANK_STRIDE;
1344 static int px30_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
1349 struct rockchip_pinctrl *info = bank->drvdata;
1352 if (bank->bank_num == 0) {
1360 *reg += (bank->bank_num - 1) * PX30_SCHMITT_BANK_STRIDE;
1375 static int rv1108_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
1379 struct rockchip_pinctrl *info = bank->drvdata;
1381 /* The first 24 pins of the first bank are located in PMU */
1382 if (bank->bank_num == 0) {
1388 /* correct the offset, as we're starting with the 2nd bank */
1390 *reg += bank->bank_num * RV1108_PULL_BANK_STRIDE;
1406 static int rv1108_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
1410 struct rockchip_pinctrl *info = bank->drvdata;
1412 /* The first 24 pins of the first bank are located in PMU */
1413 if (bank->bank_num == 0) {
1420 /* correct the offset, as we're starting with the 2nd bank */
1422 *reg += bank->bank_num * RV1108_DRV_BANK_STRIDE;
1438 static int rv1108_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
1443 struct rockchip_pinctrl *info = bank->drvdata;
1446 if (bank->bank_num == 0) {
1454 *reg += (bank->bank_num - 1) * RV1108_SCHMITT_BANK_STRIDE;
1469 static int rv1126_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
1473 struct rockchip_pinctrl *info = bank->drvdata;
1475 /* The first 24 pins of the first bank are located in PMU */
1476 if (bank->bank_num == 0) {
1490 *reg += (bank->bank_num - 1) * RV1126_PULL_BANK_STRIDE;
1506 static int rv1126_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
1510 struct rockchip_pinctrl *info = bank->drvdata;
1512 /* The first 24 pins of the first bank are located in PMU */
1513 if (bank->bank_num == 0) {
1528 *reg += (bank->bank_num - 1) * RV1126_DRV_BANK_STRIDE;
1544 static int rv1126_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
1549 struct rockchip_pinctrl *info = bank->drvdata;
1552 if (bank->bank_num == 0) {
1567 *reg += (bank->bank_num - 1) * RV1126_SCHMITT_BANK_STRIDE;
1579 static int rk3308_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
1583 struct rockchip_pinctrl *info = bank->drvdata;
1588 *reg += bank->bank_num * RK3308_SCHMITT_BANK_STRIDE;
1599 static int rk2928_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
1603 struct rockchip_pinctrl *info = bank->drvdata;
1607 *reg += bank->bank_num * RK2928_PULL_BANK_STRIDE;
1617 static int rk3128_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
1621 struct rockchip_pinctrl *info = bank->drvdata;
1625 *reg += bank->bank_num * RK2928_PULL_BANK_STRIDE;
1639 static int rk3188_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
1643 struct rockchip_pinctrl *info = bank->drvdata;
1645 /* The first 12 pins of the first bank are located elsewhere */
1646 if (bank->bank_num == 0 && pin_num < 12) {
1648 : bank->regmap_pull;
1660 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
1676 static int rk3288_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
1680 struct rockchip_pinctrl *info = bank->drvdata;
1682 /* The first 24 pins of the first bank are located in PMU */
1683 if (bank->bank_num == 0) {
1694 /* correct the offset, as we're starting with the 2nd bank */
1696 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
1712 static int rk3288_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
1716 struct rockchip_pinctrl *info = bank->drvdata;
1718 /* The first 24 pins of the first bank are located in PMU */
1719 if (bank->bank_num == 0) {
1730 /* correct the offset, as we're starting with the 2nd bank */
1732 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE;
1744 static int rk3228_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
1748 struct rockchip_pinctrl *info = bank->drvdata;
1752 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
1763 static int rk3228_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
1767 struct rockchip_pinctrl *info = bank->drvdata;
1771 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE;
1782 static int rk3308_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
1786 struct rockchip_pinctrl *info = bank->drvdata;
1790 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
1801 static int rk3308_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
1805 struct rockchip_pinctrl *info = bank->drvdata;
1809 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE;
1821 static int rk3368_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
1825 struct rockchip_pinctrl *info = bank->drvdata;
1827 /* The first 32 pins of the first bank are located in PMU */
1828 if (bank->bank_num == 0) {
1839 /* correct the offset, as we're starting with the 2nd bank */
1841 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
1854 static int rk3368_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
1858 struct rockchip_pinctrl *info = bank->drvdata;
1860 /* The first 32 pins of the first bank are located in PMU */
1861 if (bank->bank_num == 0) {
1872 /* correct the offset, as we're starting with the 2nd bank */
1874 *reg += bank->bank_num * RK3288_DRV_BANK_STRIDE;
1888 static int rk3399_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
1892 struct rockchip_pinctrl *info = bank->drvdata;
1895 if ((bank->bank_num == 0) || (bank->bank_num == 1)) {
1899 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
1908 /* correct the offset, as we're starting with the 3rd bank */
1910 *reg += bank->bank_num * RK3188_PULL_BANK_STRIDE;
1920 static int rk3399_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
1924 struct rockchip_pinctrl *info = bank->drvdata;
1928 if ((bank->bank_num == 0) || (bank->bank_num == 1))
1933 *reg = bank->drv[drv_num].offset;
1934 if ((bank->drv[drv_num].drv_type == DRV_TYPE_IO_1V8_3V0_AUTO) ||
1935 (bank->drv[drv_num].drv_type == DRV_TYPE_IO_3V3_ONLY))
1949 static int rk3568_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
1953 struct rockchip_pinctrl *info = bank->drvdata;
1955 if (bank->bank_num == 0) {
1958 *reg += bank->bank_num * RK3568_PULL_BANK_STRIDE;
1966 *reg += (bank->bank_num - 1) * RK3568_PULL_BANK_STRIDE;
1982 static int rk3568_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
1986 struct rockchip_pinctrl *info = bank->drvdata;
1988 /* The first 32 pins of the first bank are located in PMU */
1989 if (bank->bank_num == 0) {
1999 *reg += (bank->bank_num - 1) * RK3568_DRV_BANK_STRIDE;
2117 static int rk3588_calc_pull_reg_and_bit(struct rockchip_pin_bank *bank,
2121 struct rockchip_pinctrl *info = bank->drvdata;
2122 u8 bank_num = bank->bank_num;
2142 static int rk3588_calc_drv_reg_and_bit(struct rockchip_pin_bank *bank,
2146 struct rockchip_pinctrl *info = bank->drvdata;
2147 u8 bank_num = bank->bank_num;
2167 static int rk3588_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
2172 struct rockchip_pinctrl *info = bank->drvdata;
2173 u8 bank_num = bank->bank_num;
2198 static int rockchip_get_drive_perpin(struct rockchip_pin_bank *bank,
2201 struct rockchip_pinctrl *info = bank->drvdata;
2208 int drv_type = bank->drv[pin_num / 8].drv_type;
2210 ret = ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit);
2277 static int rockchip_set_drive_perpin(struct rockchip_pin_bank *bank,
2280 struct rockchip_pinctrl *info = bank->drvdata;
2287 int drv_type = bank->drv[pin_num / 8].drv_type;
2290 bank->bank_num, pin_num, strength);
2292 ret = ctrl->drv_calc_reg(bank, pin_num, ®map, ®, &bit);
2403 static int rockchip_get_pull(struct rockchip_pin_bank *bank, int pin_num)
2405 struct rockchip_pinctrl *info = bank->drvdata;
2417 ret = ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit);
2440 pull_type = bank->pull_type[pin_num / 8];
2447 if (ctrl->type == RK3568 && bank->bank_num == 0 && pin_num >= 27 && pin_num <= 30) {
2459 static int rockchip_set_pull(struct rockchip_pin_bank *bank,
2462 struct rockchip_pinctrl *info = bank->drvdata;
2470 dev_dbg(dev, "setting pull of GPIO%d-%d to %d\n", bank->bank_num, pin_num, pull);
2476 ret = ctrl->pull_calc_reg(bank, pin_num, ®map, ®, &bit);
2498 pull_type = bank->pull_type[pin_num / 8];
2511 if (ctrl->type == RK3568 && bank->bank_num == 0 && pin_num >= 27 && pin_num <= 30) {
2541 static int rk3328_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
2546 struct rockchip_pinctrl *info = bank->drvdata;
2551 *reg += bank->bank_num * RK3328_SCHMITT_BANK_STRIDE;
2564 static int rk3568_calc_schmitt_reg_and_bit(struct rockchip_pin_bank *bank,
2569 struct rockchip_pinctrl *info = bank->drvdata;
2571 if (bank->bank_num == 0) {
2577 *reg += (bank->bank_num - 1) * RK3568_SCHMITT_BANK_STRIDE;
2587 static int rockchip_get_schmitt(struct rockchip_pin_bank *bank, int pin_num)
2589 struct rockchip_pinctrl *info = bank->drvdata;
2596 ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit);
2615 static int rockchip_set_schmitt(struct rockchip_pin_bank *bank,
2618 struct rockchip_pinctrl *info = bank->drvdata;
2627 bank->bank_num, pin_num, enable);
2629 ret = ctrl->schmitt_calc_reg(bank, pin_num, ®map, ®, &bit);
2687 struct rockchip_pin_bank *bank;
2698 bank = pin_to_bank(info, pins[cnt]);
2699 ret = rockchip_set_mux(bank, pins[cnt] - bank->pin_base,
2708 rockchip_set_mux(bank, pins[cnt] - bank->pin_base, 0);
2722 struct rockchip_pin_bank *bank;
2724 bank = pin_to_bank(info, offset);
2725 return rockchip_set_mux(bank, offset - bank->pin_base, RK_FUNC_GPIO);
2766 static int rockchip_pinconf_defer_pin(struct rockchip_pin_bank *bank,
2779 list_add_tail(&cfg->head, &bank->deferred_pins);
2789 struct rockchip_pin_bank *bank = pin_to_bank(info, pin);
2790 struct gpio_chip *gpio = &bank->gpio_chip;
2806 mutex_lock(&bank->deferred_lock);
2808 rc = rockchip_pinconf_defer_pin(bank, pin - bank->pin_base, param,
2810 mutex_unlock(&bank->deferred_lock);
2816 mutex_unlock(&bank->deferred_lock);
2821 rc = rockchip_set_pull(bank, pin - bank->pin_base,
2836 rc = rockchip_set_pull(bank, pin - bank->pin_base,
2842 rc = rockchip_set_mux(bank, pin - bank->pin_base,
2847 rc = gpio->direction_output(gpio, pin - bank->pin_base,
2853 rc = rockchip_set_mux(bank, pin - bank->pin_base,
2858 rc = gpio->direction_input(gpio, pin - bank->pin_base);
2867 rc = rockchip_set_drive_perpin(bank,
2868 pin - bank->pin_base, arg);
2876 rc = rockchip_set_schmitt(bank,
2877 pin - bank->pin_base, arg);
2895 struct rockchip_pin_bank *bank = pin_to_bank(info, pin);
2896 struct gpio_chip *gpio = &bank->gpio_chip;
2903 if (rockchip_get_pull(bank, pin - bank->pin_base) != param)
2915 if (rockchip_get_pull(bank, pin - bank->pin_base) != param)
2921 rc = rockchip_get_mux(bank, pin - bank->pin_base);
2930 rc = gpio->get(gpio, pin - bank->pin_base);
2941 rc = rockchip_get_drive_perpin(bank, pin - bank->pin_base);
2951 rc = rockchip_get_schmitt(bank, pin - bank->pin_base);
2974 { .compatible = "rockchip,gpio-bank" },
2999 struct rockchip_pin_bank *bank;
3012 * the binding format is rockchip,pins = <bank pin mux CONFIG>,
3033 bank = bank_num_to_bank(info, num);
3034 if (IS_ERR(bank))
3035 return PTR_ERR(bank);
3037 grp->pins[j] = bank->pin_base + be32_to_cpu(*list++);
3141 int pin, bank, ret;
3158 for (bank = 0, k = 0; bank < info->ctrl->nr_banks; bank++) {
3159 pin_bank = &info->ctrl->pin_banks[bank];
3197 struct rockchip_pin_bank *bank;
3207 bank = ctrl->pin_banks;
3208 for (i = 0; i < ctrl->nr_banks; ++i, ++bank) {
3211 raw_spin_lock_init(&bank->slock);
3212 bank->drvdata = d;
3213 bank->pin_base = ctrl->nr_pins;
3214 ctrl->nr_pins += bank->nr_pins;
3218 struct rockchip_iomux *iom = &bank->iomux[j];
3219 struct rockchip_drv *drv = &bank->drv[j];
3222 if (bank_pins >= bank->nr_pins)
3249 dev_dbg(dev, "bank %d, iomux %d has iom_offset 0x%x drv_offset 0x%x\n",
3282 /* calculate the per-bank recalced_mask */
3286 if (ctrl->iomux_recalced[j].num == bank->bank_num) {
3288 bank->recalced_mask |= BIT(pin);
3292 /* calculate the per-bank route_mask */
3296 if (ctrl->iomux_routes[j].bank_num == bank->bank_num) {
3298 bank->route_mask |= BIT(pin);
3435 struct rockchip_pin_bank *bank;
3442 bank = &info->ctrl->pin_banks[i];
3444 mutex_lock(&bank->deferred_lock);
3445 while (!list_empty(&bank->deferred_pins)) {
3446 cfg = list_first_entry(&bank->deferred_pins,
3451 mutex_unlock(&bank->deferred_lock);