/linux-master/arch/mips/kernel/ |
H A D | cps-vec-ns16550.S | 107 move s4, a0 110 move a0, s4
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H A D | relocate_kernel.S | 38 and s4, s2, ~0x1 /* store destination addr in s4 */ 63 REG_S s5, (s4) 64 PTR_ADDIU s4, s4, SZREG
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/linux-master/arch/riscv/crypto/ |
H A D | chacha-riscv64-zvkb.S | 67 #define KEY4 s4 148 sd s4, 32(sp) 284 ld s4, 32(sp)
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/linux-master/arch/riscv/include/asm/ |
H A D | assembler.h | 52 REG_L s4, (SUSPEND_CONTEXT_REGS + PT_S4)(a0) variable
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H A D | compat.h | 60 compat_ulong_t s4; member in struct:compat_user_regs_struct 97 cregs->s4 = (compat_ulong_t) regs->s4; 134 regs->s4 = (unsigned long) cregs->s4;
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H A D | kvm_host.h | 136 unsigned long s4; member in struct:kvm_cpu_context
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H A D | ptrace.h | 36 unsigned long s4; member in struct:pt_regs
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/linux-master/arch/riscv/include/uapi/asm/ |
H A D | ptrace.h | 45 unsigned long s4; member in struct:user_regs_struct
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/linux-master/arch/riscv/kernel/ |
H A D | asm-offsets.c | 92 OFFSET(PT_S4, pt_regs, s4); 149 OFFSET(KVM_ARCH_GUEST_S4, kvm_vcpu_arch, guest_context.s4); 186 OFFSET(KVM_ARCH_HOST_S4, kvm_vcpu_arch, host_context.s4);
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H A D | crash_save_regs.S | 33 REG_S s4, PT_S4(a0) /* x20 */
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H A D | entry.S | 65 csrr s4, CSR_CAUSE 71 REG_S s4, PT_CAUSE(sp) 97 bge s4, zero, 1f 103 slli t0, s4, RISCV_LGPTR 213 csrr s4, CSR_CAUSE 219 REG_S s4, PT_CAUSE(sp) 297 REG_S s4, TASK_THREAD_S4_RA(a3) 314 REG_L s4, TASK_THREAD_S4_RA(a4)
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H A D | head.S | 32 c.li s4,-13 373 li s4, 0
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H A D | hibernate-asm.S | 49 REG_L s4, restore_pblist 67 REG_L a1, HIBERN_PBE_ADDR(s4) 68 REG_L a0, HIBERN_PBE_ORIG(s4) 72 REG_L s4, HIBERN_PBE_NEXT(s4) 73 bnez s4, .Lcopy
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H A D | kexec_relocate.S | 20 * s4: (const) kernel_map.va_pa_offset, used when switching MMU off 28 mv s4, a4 46 sub s6, s6, s4 117 mv s4, zero 181 mv s4, zero
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H A D | kgdb.c | 189 {DBG_REG_S4, GDB_SIZEOF_REG, offsetof(struct pt_regs, s4)},
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H A D | process.c | 81 pr_cont(" s2 : " REG_FMT " s3 : " REG_FMT " s4 : " REG_FMT "\n", 82 regs->s2, regs->s3, regs->s4);
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H A D | ptrace.c | 223 REG_OFFSET_NAME(s4),
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H A D | suspend_entry.S | 36 REG_S s4, (SUSPEND_CONTEXT_REGS + PT_S4)(a0)
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/linux-master/arch/riscv/kvm/ |
H A D | vcpu_switch.S | 35 REG_S s4, (KVM_ARCH_HOST_S4)(a0) 95 REG_L s4, (KVM_ARCH_GUEST_S4)(a0) 139 REG_S s4, (KVM_ARCH_GUEST_S4)(a0) 200 REG_L s4, (KVM_ARCH_HOST_S4)(a0)
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/linux-master/arch/riscv/net/ |
H A D | bpf_jit_comp64.c | 47 [RV_REG_S4] = offsetof(struct pt_regs, s4),
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/linux-master/arch/x86/crypto/ |
H A D | aegis128-aesni-asm.S | 384 .macro encrypt_block a s0 s1 s2 s3 s4 i 388 pxor \s4, T0 395 pxor MSG, \s4 539 .macro decrypt_block a s0 s1 s2 s3 s4 i 542 pxor \s4, MSG 549 pxor MSG, \s4
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H A D | cast5-avx-x86_64-asm_64.S | 30 #define s4 cast_s4 define 98 leaq s4(%rip), RID1; \
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H A D | cast6-avx-x86_64-asm_64.S | 30 #define s4 cast_s4 define 98 leaq s4(%rip), RID1; \
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H A D | des3_ede-asm_64.S | 16 #define s4 ((s3) + (64*8)) define 17 #define s5 ((s4) + (64*8)) 139 leaq s4(%rip), RW1; \ 373 leaq s4(%rip), RT2; \ 402 leaq s4(%rip), RT2; \ 431 leaq s4(%rip), RT2; \
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/linux-master/arch/x86/include/asm/uv/ |
H A D | uv_mmrs.h | 54 * } s4; 781 } s4; member in union:uvh_event_occurred0_u 1469 } s4; member in union:uvyh_event_occurred1_u 2050 } s4; member in union:uvyh_event_occurred2_u 2162 } s4; member in union:uvh_extio_int0_broadcast_u 2230 } s4; member in union:uvyh_gr0_gam_gr_config_u 2319 } s4; member in union:uvh_gr0_tlb_int0_config_u 2422 } s4; member in union:uvh_gr0_tlb_int1_config_u 2525 } s4; member in union:uvh_gr1_tlb_int0_config_u 2628 } s4; member in union:uvh_gr1_tlb_int1_config_u 2688 } s4; member in union:uvh_int_cmpb_u 2755 } s4; member in union:uvh_ipi_int_u 2882 } s4; member in union:uvh_node_id_u 3014 } s4; member in union:uvh_node_present_table_u 3420 } s4; member in union:uvh_rh_gam_addr_map_config_u 3487 } s4; member in union:uvh_rh_gam_alias_0_overlay_config_u 3547 } s4; member in union:uvh_rh_gam_alias_0_redirect_config_u 3614 } s4; member in union:uvh_rh_gam_alias_1_overlay_config_u 3674 } s4; member in union:uvh_rh_gam_alias_1_redirect_config_u 3741 } s4; member in union:uvh_rh_gam_alias_2_overlay_config_u 3801 } s4; member in union:uvh_rh_gam_alias_2_redirect_config_u 3904 } s4; member in union:uvh_rh_gam_gru_overlay_config_u 4068 } s4; member in union:uvh_rh_gam_mmioh_overlay_config0_u 4164 } s4; member in union:uvh_rh_gam_mmioh_overlay_config1_u 4234 } s4; member in union:uvh_rh_gam_mmioh_redirect_config0_u 4300 } s4; member in union:uvh_rh_gam_mmioh_redirect_config1_u 4372 } s4; member in union:uvh_rh_gam_mmr_overlay_config_u 4425 } s4; member in union:uvh_rtc_u 4507 } s4; member in union:uvh_rtc1_int_config_u 4607 } s4; member in union:uvh_scratch5_u [all...] |