Searched refs:idx (Results 226 - 250 of 3979) sorted by relevance

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/linux-master/drivers/firmware/imx/
H A Dimx-dsp.c24 int imx_dsp_ring_doorbell(struct imx_dsp_ipc *ipc, unsigned int idx) argument
29 if (idx >= DSP_MU_CHAN_NUM)
32 dsp_chan = &ipc->chans[idx];
54 if (chan->idx == 0) {
62 struct mbox_chan *imx_dsp_request_channel(struct imx_dsp_ipc *dsp_ipc, int idx) argument
66 if (idx >= DSP_MU_CHAN_NUM)
69 dsp_chan = &dsp_ipc->chans[idx];
75 void imx_dsp_free_channel(struct imx_dsp_ipc *dsp_ipc, int idx) argument
79 if (idx >= DSP_MU_CHAN_NUM)
82 dsp_chan = &dsp_ipc->chans[idx];
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/linux-master/include/linux/
H A Dbpf_mprog.h275 static inline void bpf_mprog_entry_grow(struct bpf_mprog_entry *entry, int idx) argument
279 memmove(entry->fp_items + idx + 1,
280 entry->fp_items + idx,
281 (total - idx) * sizeof(struct bpf_mprog_fp));
283 memmove(entry->parent->cp_items + idx + 1,
284 entry->parent->cp_items + idx,
285 (total - idx) * sizeof(struct bpf_mprog_cp));
288 static inline void bpf_mprog_entry_shrink(struct bpf_mprog_entry *entry, int idx) argument
295 memmove(entry->fp_items + idx,
296 entry->fp_items + idx
304 bpf_mprog_read(struct bpf_mprog_entry *entry, u32 idx, struct bpf_mprog_fp **fp, struct bpf_mprog_cp **cp) argument
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/linux-master/drivers/perf/
H A Darm_smmuv3_pmu.c164 struct perf_event *event, int idx);
169 unsigned int idx; local
171 for_each_set_bit(idx, smmu_pmu->used_counters, smmu_pmu->num_counters)
172 smmu_pmu_apply_event_filter(smmu_pmu, smmu_pmu->events[idx], idx);
188 unsigned int idx; local
195 for_each_set_bit(idx, smmu_pmu->used_counters, smmu_pmu->num_counters)
196 writel(0xffff, smmu_pmu->reg_base + SMMU_PMCG_EVTYPER(idx));
202 u32 idx, u64 value)
205 writeq(value, smmu_pmu->reloc_base + SMMU_PMCG_EVCNTR(idx,
201 smmu_pmu_counter_set_value(struct smmu_pmu *smmu_pmu, u32 idx, u64 value) argument
210 smmu_pmu_counter_get_value(struct smmu_pmu *smmu_pmu, u32 idx) argument
222 smmu_pmu_counter_enable(struct smmu_pmu *smmu_pmu, u32 idx) argument
227 smmu_pmu_counter_disable(struct smmu_pmu *smmu_pmu, u32 idx) argument
232 smmu_pmu_interrupt_enable(struct smmu_pmu *smmu_pmu, u32 idx) argument
237 smmu_pmu_interrupt_disable(struct smmu_pmu *smmu_pmu, u32 idx) argument
243 smmu_pmu_set_evtyper(struct smmu_pmu *smmu_pmu, u32 idx, u32 val) argument
249 smmu_pmu_set_smr(struct smmu_pmu *smmu_pmu, u32 idx, u32 val) argument
259 u32 idx = hwc->idx; local
276 u32 idx = hwc->idx; local
302 smmu_pmu_set_event_filter(struct perf_event *event, int idx, u32 span, u32 sid) argument
326 smmu_pmu_apply_event_filter(struct smmu_pmu *smmu_pmu, struct perf_event *event, int idx) argument
360 int idx, err; local
460 int idx = hwc->idx; local
473 int idx = hwc->idx; local
487 int idx; local
514 int idx = hwc->idx; local
690 unsigned int idx; local
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H A Darm_dmc620_pmu.c265 unsigned int idx, unsigned int reg)
267 return readl(dmc620_pmu->base + DMC620_PMU_COUNTERn_OFFSET(idx) + reg);
272 unsigned int idx, unsigned int reg, u32 val)
274 writel(val, dmc620_pmu->base + DMC620_PMU_COUNTERn_OFFSET(idx) + reg);
296 int idx, start_idx, end_idx; local
306 for (idx = start_idx; idx < end_idx; ++idx) {
307 if (!test_and_set_bit(idx, dmc620_pmu->used_mask))
308 return idx;
264 dmc620_pmu_creg_read(struct dmc620_pmu *dmc620_pmu, unsigned int idx, unsigned int reg) argument
271 dmc620_pmu_creg_write(struct dmc620_pmu *dmc620_pmu, unsigned int idx, unsigned int reg, u32 val) argument
376 unsigned int idx; local
590 int idx; local
624 int idx = hwc->idx; local
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/linux-master/arch/xtensa/kernel/
H A Dperf_event.c135 static inline uint32_t xtensa_pmu_read_counter(int idx) argument
137 return get_er(XTENSA_PMU_PM(idx));
140 static inline void xtensa_pmu_write_counter(int idx, uint32_t v) argument
142 set_er(v, XTENSA_PMU_PM(idx));
146 struct hw_perf_event *hwc, int idx)
153 new_raw_count = xtensa_pmu_read_counter(event->hw.idx);
164 struct hw_perf_event *hwc, int idx)
191 xtensa_pmu_write_counter(idx, -left);
252 int idx = hwc->idx; local
145 xtensa_perf_event_update(struct perf_event *event, struct hw_perf_event *hwc, int idx) argument
163 xtensa_perf_event_set_period(struct perf_event *event, struct hw_perf_event *hwc, int idx) argument
270 int idx = hwc->idx; local
294 int idx = hwc->idx; local
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/linux-master/net/netfilter/
H A Dnft_set_bitmap.c54 u32 *idx, u32 *off)
64 *idx = k / BITS_PER_BYTE;
72 nft_bitmap_active(const u8 *bitmap, u32 idx, u32 off, u8 genmask) argument
74 return (bitmap[idx] & (0x3 << off)) & (genmask << off);
83 u32 idx, off; local
85 nft_bitmap_location(set, key, &idx, &off);
87 return nft_bitmap_active(priv->bitmap, idx, off, genmask);
133 u32 idx, off; local
141 nft_bitmap_location(set, nft_set_ext_key(&new->ext), &idx, &off);
143 priv->bitmap[idx] |
52 nft_bitmap_location(const struct nft_set *set, const void *key, u32 *idx, u32 *off) argument
155 u32 idx, off; local
170 u32 idx, off; local
185 u32 idx, off; local
200 u32 idx, off; local
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/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/clk/
H A Dgf100.c133 read_clk(struct gf100_clk *clk, int idx) argument
136 u32 sctl = nvkm_rd32(device, 0x137250 + (idx * 4));
140 if (ssel & (1 << idx)) {
141 if (idx < 7)
142 sclk = read_pll(clk, 0x137000 + (idx * 0x20));
147 sclk = read_div(clk, idx, 0x137160, 0x1371d0);
210 calc_div(struct gf100_clk *clk, int idx, u32 ref, u32 freq, u32 *ddiv) argument
221 calc_src(struct gf100_clk *clk, int idx, u32 freq, u32 *dsrc, u32 *ddiv) argument
243 sclk = read_vco(clk, 0x137160 + (idx * 4));
244 if (idx <
250 calc_pll(struct gf100_clk *clk, int idx, u32 freq, u32 *coef) argument
274 calc_clk(struct gf100_clk *clk, struct nvkm_cstate *cstate, int idx, int dom) argument
344 gf100_clk_prog_0(struct gf100_clk *clk, int idx) argument
355 gf100_clk_prog_1(struct gf100_clk *clk, int idx) argument
366 gf100_clk_prog_2(struct gf100_clk *clk, int idx) argument
393 gf100_clk_prog_3(struct gf100_clk *clk, int idx) argument
408 gf100_clk_prog_4(struct gf100_clk *clk, int idx) argument
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/linux-master/drivers/infiniband/hw/irdma/
H A Dpble.c69 * @idx: where to return indexes
72 struct sd_pd_idx *idx)
74 idx->sd_idx = (u32)pble_rsrc->next_fpm_addr / IRDMA_HMC_DIRECT_BP_SIZE;
75 idx->pd_idx = (u32)(pble_rsrc->next_fpm_addr / IRDMA_HMC_PAGED_BP_SIZE);
76 idx->rel_pd_idx = (idx->pd_idx % IRDMA_HMC_PD_CNT_IN_SD);
89 struct sd_pd_idx *idx = &info->idx; local
97 info->idx.sd_idx,
106 offset = idx
71 get_sd_pd_idx(struct irdma_hmc_pble_rsrc *pble_rsrc, struct sd_pd_idx *idx) argument
124 u64 idx; local
191 irdma_get_type(struct irdma_sc_dev *dev, struct sd_pd_idx *idx, u32 pages) argument
212 struct sd_pd_idx *idx = &info.idx; local
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/linux-master/drivers/perf/hisilicon/
H A Dhisi_pcie_pmu.c178 #define EXT_COUNTER_IS_USED(idx) ((idx) & BIT(16))
185 static u32 hisi_pcie_pmu_get_offset(u32 offset, u32 idx) argument
187 return offset + HISI_PCIE_REG_STEP * idx;
191 u32 idx)
193 u32 offset = hisi_pcie_pmu_get_offset(reg_offset, idx);
198 static void hisi_pcie_pmu_writel(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset, u32 idx, u32 val) argument
200 u32 offset = hisi_pcie_pmu_get_offset(reg_offset, idx);
205 static u64 hisi_pcie_pmu_readq(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset, u32 idx) argument
207 u32 offset = hisi_pcie_pmu_get_offset(reg_offset, idx);
190 hisi_pcie_pmu_readl(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset, u32 idx) argument
212 hisi_pcie_pmu_writeq(struct hisi_pcie_pmu *pcie_pmu, u32 reg_offset, u32 idx, u64 val) argument
396 u32 idx = event->hw.idx; local
410 int idx; local
453 int idx = hwc->idx; local
462 u32 idx = hwc->idx; local
472 u32 idx = hwc->idx; local
482 u32 idx = hwc->idx; local
489 u32 idx = hwc->idx; local
494 hisi_pcie_pmu_reset_counter(struct hisi_pcie_pmu *pcie_pmu, int idx) argument
504 int idx = hwc->idx; local
548 int idx; local
609 int idx; local
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/linux-master/drivers/pnp/
H A Dmanager.c38 static int pnp_assign_port(struct pnp_dev *dev, struct pnp_port *rule, int idx) argument
42 res = pnp_find_resource(dev, rule->flags, IORESOURCE_IO, idx);
45 "flags %#lx\n", idx, (unsigned long long) res->start,
57 pnp_dbg(&dev->dev, " io %d disabled\n", idx);
69 "(min %#llx max %#llx)\n", idx,
81 static int pnp_assign_mem(struct pnp_dev *dev, struct pnp_mem *rule, int idx) argument
85 res = pnp_find_resource(dev, rule->flags, IORESOURCE_MEM, idx);
88 "flags %#lx\n", idx, (unsigned long long) res->start,
108 pnp_dbg(&dev->dev, " mem %d disabled\n", idx);
120 "(min %#llx max %#llx)\n", idx,
132 pnp_assign_irq(struct pnp_dev *dev, struct pnp_irq *rule, int idx) argument
191 pnp_assign_dma(struct pnp_dev *dev, struct pnp_dma *rule, int idx) argument
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/linux-master/arch/arm/kernel/
H A Dperf_event_v6.c176 int counter = hwc->idx;
194 int counter = hwc->idx;
210 int idx = hwc->idx; local
212 if (ARMV6_CYCLE_COUNTER == idx) {
215 } else if (ARMV6_COUNTER0 == idx) {
219 } else if (ARMV6_COUNTER1 == idx) {
224 WARN_ONCE(1, "invalid counter number (%d)\n", idx);
245 int idx; local
259 for (idx
351 int idx = hwc->idx; local
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/linux-master/drivers/irqchip/
H A Dirq-bcm6345-l1.c121 unsigned int idx; local
125 for (idx = 0; idx < intc->n_words; idx++) {
126 int base = idx * IRQS_PER_WORD;
130 pending = __raw_readl(cpu->map_base + reg_status(intc, idx));
131 pending &= __raw_readl(cpu->map_base + reg_enable(intc, idx));
227 unsigned int idx,
235 if (of_address_to_resource(dn, idx, &res))
245 cpu = intc->cpus[idx]
226 bcm6345_l1_init_one(struct device_node *dn, unsigned int idx, struct bcm6345_l1_chip *intc) argument
300 unsigned int idx; local
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/linux-master/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A DM0205.h18 u32 nvbios_M0205Ee(struct nvkm_bios *, int idx,
20 u32 nvbios_M0205Ep(struct nvkm_bios *, int idx,
27 u32 nvbios_M0205Se(struct nvkm_bios *, int ent, int idx, u8 *ver, u8 *hdr);
28 u32 nvbios_M0205Sp(struct nvkm_bios *, int ent, int idx, u8 *ver, u8 *hdr,
H A Dperf.h21 u32 nvbios_perf_entry(struct nvkm_bios *, int idx,
23 u32 nvbios_perfEp(struct nvkm_bios *, int idx,
34 u32 nvbios_perfSe(struct nvkm_bios *, u32 data, int idx,
36 u32 nvbios_perfSp(struct nvkm_bios *, u32 data, int idx,
/linux-master/kernel/trace/
H A Dtrace_stat.h17 void *(*stat_next)(void *prev, int idx);
/linux-master/drivers/media/pci/ivtv/
H A Divtv-i2c.h13 int ivtv_i2c_register(struct ivtv *itv, unsigned idx);
/linux-master/arch/um/include/asm/
H A Dfixmap.h22 * highger than 1) use fixmap_set(idx,phys) to associate
39 extern void __set_fixmap (enum fixed_addresses idx,
/linux-master/tools/power/cpupower/utils/helpers/
H A Dmsr.c26 int read_msr(int cpu, unsigned int idx, unsigned long long *val) argument
35 if (lseek(fd, idx, SEEK_CUR) == -1)
55 int write_msr(int cpu, unsigned int idx, unsigned long long val) argument
64 if (lseek(fd, idx, SEEK_CUR) == -1)
/linux-master/include/xen/interface/io/
H A Dfbif.h80 #define XENFB_IN_RING_REF(page, idx) \
81 (XENFB_IN_RING((page))[(idx) % XENFB_IN_RING_LEN])
88 #define XENFB_OUT_RING_REF(page, idx) \
89 (XENFB_OUT_RING((page))[(idx) % XENFB_OUT_RING_LEN])
/linux-master/drivers/gpu/drm/omapdrm/
H A Domap_plane.h21 int idx, enum drm_plane_type type,
/linux-master/drivers/tty/serial/
H A Dserial_mctrl_gpio.h66 struct mctrl_gpios *mctrl_gpio_init(struct uart_port *port, unsigned int idx);
75 unsigned int idx);
131 struct mctrl_gpios *mctrl_gpio_init(struct uart_port *port, unsigned int idx) argument
137 struct mctrl_gpios *mctrl_gpio_init_noauto(struct device *dev, unsigned int idx) argument
/linux-master/tools/perf/util/
H A Dunwind-libdw.h22 int idx; member in struct:unwind_info
/linux-master/drivers/net/ethernet/mellanox/mlx5/core/en_accel/
H A Dktls_stats.c63 unsigned int i, n, idx = 0; local
71 strcpy(data + (idx++) * ETH_GSTRING_LEN,
79 unsigned int i, n, idx = 0; local
87 data[idx++] = MLX5E_READ_CTR_ATOMIC64(&priv->tls->sw_stats,
/linux-master/include/xen/
H A Dhvm.h39 static inline int hvm_get_parameter(int idx, uint64_t *value) argument
45 xhv.index = idx;
49 param_name(idx), idx, r);
/linux-master/arch/loongarch/include/asm/
H A Dfixmap.h23 extern void __set_fixmap(enum fixed_addresses idx,

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