Searched refs:priority (Results 226 - 250 of 1104) sorted by path

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/linux-master/drivers/gpu/drm/i915/gt/
H A Dselftest_lrc.c103 rq->sched.attr.priority = I915_PRIORITY_BARRIER;
557 rq->sched.attr.priority = I915_PRIORITY_BARRIER;
1248 rq->sched.attr.priority = I915_PRIORITY_BARRIER;
/linux-master/drivers/gpu/drm/i915/gt/uc/
H A Dintel_guc_fwif.h216 u32 priority; member in struct:guc_process_desc_v69
260 u32 priority; member in struct:guc_lrc_desc_v69
H A Dintel_guc_submission.c117 * on the context and the priority management state. Lock is individual to each
708 * Corner case where requests were sitting in the priority list or a
799 return rq->sched.attr.priority;
2640 MAKE_CONTEXT_POLICY_ADD(priority, SCHEDULING_PRIORITY)
2758 desc->priority = ce->guc_state.prio;
2795 desc->priority = ce->guc_state.prio;
3648 /* Lower value is higher priority */
3796 prio = ctx->sched.priority;
5457 drm_printf(p, "\t\tNumber Requests (lower index == higher priority)\n");
5460 drm_printf(p, "\t\tNumber requests in priority ban
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/linux-master/drivers/gpu/drm/i915/
H A Di915_gpu_error.c498 erq->sched_attr.priority,
507 header, ctx->comm, ctx->pid, ctx->sched_attr.priority,
H A Di915_priolist_types.h27 /* Smallest priority value that cannot be bumped. */
32 * another context. They get scheduled with their default priority and
34 * HW until finished by pretending that they have maximum priority,
35 * i.e. nothing can have higher priority and force us to usurp the
44 int priority; member in struct:i915_priolist
H A Di915_request.c622 * We must remove the request from the caller's priority queue,
624 * priority queue, under the sched_engine->lock. This ensures that the
1827 * to adjust the existing execution schedule due to a high priority
1829 * to run a high priority dependency chain *before* we can execute this
2137 if (attr->priority == I915_PRIORITY_INVALID)
2141 " prio=%d", attr->priority);
H A Di915_scheduler.c54 GEM_BUG_ON(p->priority > last_prio);
55 last_prio = p->priority;
73 /* most positive priority is scheduled first, equal priorities fifo */
79 if (prio > p->priority) {
81 } else if (prio < p->priority) {
93 /* Convert an allocation failure to a priority bump */
110 p->priority = prio;
158 const int prio = max(attr->priority, node->attr.priority);
212 if (prio > READ_ONCE(p->signaler->attr.priority))
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H A Di915_scheduler.h48 if (p->priority != I915_PRIORITY_NORMAL)
H A Di915_scheduler_types.h21 * @priority: execution and service priority
26 * @priority will be executed before those with a lower @priority
29 * The &drm_i915_private.kernel_context is assigned the lowest priority.
31 int priority; member in struct:i915_sched_attr
51 * dynamic priority changes.
57 * is put to the back of its priority queue, then reshuffling its dependents).
97 * A schedule engine represents a submission queue with different priority
112 * @lock: protects requests in priority list
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H A Di915_trace.h361 __entry->prio = rq->sched.attr.priority;
/linux-master/drivers/gpu/drm/i915/pxp/
H A Dintel_pxp_cmd.c85 struct i915_sched_attr attr = { .priority = I915_PRIORITY_MAX };
/linux-master/drivers/gpu/drm/i915/selftests/
H A Di915_request.c259 pr_err("timed out waiting for high priority request\n");
264 pr_err("low priority request already completed\n");
2523 rq->sched.attr.priority = I915_PRIORITY_BARRIER;
/linux-master/drivers/gpu/drm/imagination/
H A Dpvr_context.c313 err = remap_priority(pvr_file, args->priority, &ctx->priority);
H A Dpvr_context.h48 /** @priority: Context priority*/
49 enum pvr_context_priority priority; member in struct:pvr_context
H A Dpvr_queue.c1030 cctx_fw->priority = ctx->priority;
H A Dpvr_rogue_fwif.h680 u32 priority; member in struct:rogue_fwif_fwcommoncontext
1216 * Changes the relative scheduling priority for a particular OSid. It can
1583 s32 priority; member in struct:rogue_fwif_cmd_priority
H A Dpvr_rogue_fwif_check.h170 OFFSET_CHECK(struct rogue_fwif_fwcommoncontext, priority, 32);
/linux-master/drivers/gpu/drm/panthor/
H A Dpanthor_sched.c75 * priority+round-robin.
107 /** @priority: Group priority. */
108 u8 priority; member in struct:panthor_csg_slot
121 * enum panthor_csg_priority - Group priority
124 /** @PANTHOR_CSG_PRIORITY_LOW: Low priority group. */
127 /** @PANTHOR_CSG_PRIORITY_MEDIUM: Medium priority group. */
130 /** @PANTHOR_CSG_PRIORITY_HIGH: High priority group. */
134 * @PANTHOR_CSG_PRIORITY_RT: Real-time priority group.
136 * Real-time priority allow
392 u8 priority; member in struct:panthor_queue
539 u8 priority; member in struct:panthor_group
1209 csg_slot_prog_locked(struct panthor_device *ptdev, u32 csg_id, u32 priority) argument
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/linux-master/drivers/gpu/drm/qxl/
H A Dqxl_object.c105 bool kernel, bool pinned, u32 domain, u32 priority,
138 bo->tbo.priority = priority;
104 qxl_bo_create(struct qxl_device *qdev, unsigned long size, bool kernel, bool pinned, u32 domain, u32 priority, struct qxl_surface *surf, struct qxl_bo **bo_ptr) argument
H A Dqxl_object.h59 u32 priority,
H A Dqxl_release.c164 u32 priority)
168 QXL_GEM_DOMAIN_VRAM, priority, NULL, bo);
291 u32 priority; local
295 priority = 0;
298 priority = 1;
301 priority = 1;
323 ret = qxl_release_bo_alloc(qdev, &qdev->current_release_bo[cur_idx], priority);
162 qxl_release_bo_alloc(struct qxl_device *qdev, struct qxl_bo **bo, u32 priority) argument
/linux-master/drivers/gpu/drm/radeon/
H A Dradeon.h1045 s32 priority; member in struct:radeon_cs_parser
H A Dradeon_connectors.c389 * if priority is true, then set them disconnected if this is connected
390 * if priority is false, set us disconnected if they are connected
396 bool priority)
419 if (priority) {
393 radeon_connector_analog_encoder_conflict_solve(struct drm_connector *connector, struct drm_encoder *encoder, enum drm_connector_status current_status, bool priority) argument
H A Dradeon_cs.c44 * An item with priority "i" is added to bucket[i]. The lists are then
60 struct list_head *item, unsigned priority)
65 * with the same priority, i.e. it must be stable.
67 list_add_tail(item, &b->bucket[min(priority, RADEON_CS_MAX_PRIORITY)]);
107 unsigned priority; local
120 * Also, the buffers used for write have a higher priority than
124 priority = (r->flags & RADEON_RELOC_PRIO_MASK) * 2
145 priority = RADEON_CS_MAX_PRIORITY;
189 priority);
208 static int radeon_cs_get_ring(struct radeon_cs_parser *p, u32 ring, s32 priority) argument
59 radeon_cs_buckets_add(struct radeon_cs_buckets *b, struct list_head *item, unsigned priority) argument
276 s32 priority = 0; local
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/linux-master/drivers/gpu/drm/scheduler/
H A Dsched_entity.c41 * @priority: priority of the entity
50 * For changing @priority later on at runtime see
60 enum drm_sched_priority priority,
73 entity->priority = priority;
90 /* The "priority" of an entity cannot exceed the number of run-queues of a
92 * the lowest priority available.
94 if (entity->priority >= sched_list[0]->num_rqs) {
95 drm_err(sched_list[0], "entity with out-of-bounds priority
59 drm_sched_entity_init(struct drm_sched_entity *entity, enum drm_sched_priority priority, struct drm_gpu_scheduler **sched_list, unsigned int num_sched_list, atomic_t *guilty) argument
394 drm_sched_entity_set_priority(struct drm_sched_entity *entity, enum drm_sched_priority priority) argument
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