Searched refs:registers (Results 201 - 225 of 277) sorted by relevance

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/linux-master/sound/soc/samsung/
H A Daries_wm8994.c5 #include <linux/mfd/wm8994/registers.h>
/linux-master/drivers/gpu/drm/msm/adreno/
H A Da3xx_gpu.c170 * Most of the VBIF registers on 8974v2 have the correct
232 * into the RBBM registers on a hang:
288 /* RBBM registers */
296 /* CP registers */
303 /* RB registers */
306 /* VBIF registers */
309 /* NOTE: PM4/micro-engine firmware registers look to be the same
312 * parameterize the pfp ucode addr/data registers..
369 /* dump registers before resetting gpu, if enabled: */
562 adreno_gpu->registers
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H A Da4xx_gpu.c73 * a4xx_enable_hwcg() - Program the clock control registers
234 * into the RBBM registers on a hang:
286 /* RBBM registers */
294 /* CP registers */
299 /* RB registers */
302 /* HLSQ registers */
305 /* VPC registers */
308 /* SMMU registers */
361 /* dump registers before resetting gpu, if enabled: */
687 adreno_gpu->registers
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/linux-master/drivers/mfd/
H A Dda9062-core.c18 #include <linux/mfd/da9062/registers.h>
H A Dwm8994-regmap.c11 #include <linux/mfd/wm8994/registers.h>
H A Dcs47l15-tables.c14 #include <linux/mfd/madera/registers.h>
H A Darizona-core.c27 #include <linux/mfd/arizona/registers.h>
/linux-master/drivers/firewire/
H A Dcore-transaction.c587 * Address allocations are exclusive, except for the FCP registers.
1296 static struct fw_address_handler registers = {
1377 fw_core_add_address_handler(&registers, &registers_region);
1291 static struct fw_address_handler registers = { variable in typeref:struct:fw_address_handler
/linux-master/arch/arm/mm/
H A Dproc-v7.S263 @ rules, and so it may corrupt registers that we need to preserve.
604 @ Cortex-A9 - needs more registers preserved across suspend/resume
/linux-master/drivers/gpu/drm/vc4/
H A Dvc4_hdmi.c816 &vc4_hdmi->variant->registers[HDMI_RAM_PACKET_START];
2690 &vc4_hdmi->variant->registers[HDMI_MAI_DATA];
3376 const struct vc4_hdmi_register *field = &variant->registers[i];
3798 .registers = vc4_hdmi_fields,
3818 .registers = vc5_hdmi_hdmi0_fields,
3847 .registers = vc5_hdmi_hdmi1_fields,
/linux-master/drivers/gpu/drm/i915/gvt/
H A Dhandlers.c914 gvt_vgpu_err("Unsupported registers %x\n", offset);
1185 /* write to the data registers */
1289 /* clear the data registers */
1360 if (display->sbi.registers[i].offset == sbi_offset)
1366 return display->sbi.registers[i].value;
1377 if (display->sbi.registers[i].offset == offset)
1389 display->sbi.registers[i].offset = offset;
1390 display->sbi.registers[i].value = value;
1730 * anytime, since we don't touch real physical registers here.
1752 * update the VM CSB status correctly. Here listed registers ca
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/linux-master/arch/m68k/ifpsp060/src/
H A Dilsp.S545 # load temp registers with operands
671 # load temp registers with operands
/linux-master/arch/xtensa/kernel/
H A Dentry.S94 * Save some special registers, extra states and all registers in the AR
161 s32i a2, a1, PT_WMASK # needed for restoring registers
170 /* Save only live registers. */
193 /* Save the remaining registers.
194 * We have to save all registers up to the first '1' from
215 extui a2, a2, 0, 4 # mask for the first 16 registers
219 /* Save 4 registers at a time */
250 * Save special registers and the live window frame.
346 * Save the remaining special registers, switc
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/linux-master/arch/m68k/fpsp040/
H A Dsrem_mod.S110 moveml %d2-%d7,-(%a7) | ...save data registers
/linux-master/drivers/scsi/isci/
H A Dregisters.h61 * registers.
840 * * Port Task Scheduler registers shift and mask values
907 * These registers are based off of BAR0
955 * struct smu_registers - These are the SMU registers
1033 /* MSI-X registers not included */
1123 * registers
1464 u32 registers[256]; member in struct:scu_viit_registers
1505 * Scheduler registers
1628 /* Uaoa AFE registers */
1743 * read/write to these registers a
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/linux-master/sound/soc/codecs/
H A Dwm_hubs.c16 #include <linux/mfd/wm8994/registers.h>
H A Dwm8958-dsp2.c24 #include <linux/mfd/wm8994/registers.h>
H A Dwm8997.c27 #include <linux/mfd/arizona/registers.h>
/linux-master/arch/microblaze/kernel/
H A Dhw_exception_handler.S42 * these registers are saved/restored
75 #include <asm/registers.h>
369 /* Working registers already saved: R3, R4, R5, R6
483 /* Working registers already saved: R3, R4, R5, R6
563 /* Done...restore registers and get out of here. */
572 /* The bailout. Restore registers to pre-exception conditions
584 /* Working registers already saved: R3, R4, R5, R6
597 /* Working registers already saved: R3, R4, R5, R6
653 /* The bailout. Restore registers to pre-exception conditions
664 * different registers an
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/linux-master/drivers/gpu/drm/amd/amdkfd/
H A Dcwsr_trap_handler_gfx8.asm252 /* save HW registers */
608 /* restore HW registers */
/linux-master/drivers/regulator/
H A Dmt6358-regulator.c5 #include <linux/mfd/mt6358/registers.h>
H A Dda9063-regulator.c22 #include <linux/mfd/da9063/registers.h>
73 /* Regulator capabilities and registers description */
H A Dda9062-regulator.c18 #include <linux/mfd/da9062/registers.h>
45 /* Regulator capabilities and registers description */
/linux-master/drivers/pinctrl/cirrus/
H A Dpinctrl-madera-core.c23 #include <linux/mfd/madera/registers.h>
/linux-master/drivers/net/ethernet/sfc/siena/
H A Dsiena.c114 tests->registers =

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