Searched refs:resv (Results 201 - 225 of 272) sorted by last modified time

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/linux-master/include/linux/mlx4/
H A Ddevice.h1013 __be16 resv; member in struct:mlx4_mad_ifc
/linux-master/drivers/gpu/drm/vc4/
H A Dvc4_crtc.c923 ret = dma_resv_get_singleton(dma_bo->base.resv, DMA_RESV_USAGE_READ, &fence);
/linux-master/drivers/gpu/drm/radeon/
H A Dradeon_test.c123 vram_obj->tbo.base.resv);
127 vram_obj->tbo.base.resv);
174 vram_obj->tbo.base.resv);
178 vram_obj->tbo.base.resv);
H A Dradeon_cs.c257 struct dma_resv *resv; local
259 resv = reloc->robj->tbo.base.resv;
260 r = radeon_sync_resv(p->rdev, &p->ib.sync, resv,
543 r = dma_resv_reserve_fences(bo->tbo.base.resv, 1);
/linux-master/drivers/gpu/drm/omapdrm/
H A Domap_gem_dmabuf.c88 exp_info.resv = obj->resv;
/linux-master/drivers/gpu/drm/loongson/
H A Dlsdc_ttm.h70 struct dma_resv *resv);
H A Dlsdc_gem.h35 struct dma_resv *resv);
/linux-master/drivers/gpu/drm/i915/
H A Di915_vma.h276 #define assert_vma_held(vma) dma_resv_assert_held((vma)->obj->base.resv)
280 dma_resv_lock(vma->obj->base.resv, NULL);
285 dma_resv_unlock(vma->obj->base.resv);
/linux-master/drivers/gpu/drm/i915/gem/selftests/
H A Di915_gem_migrate.c226 err = dma_resv_reserve_fences(obj->base.resv, 1);
228 dma_resv_add_fence(obj->base.resv, &rq->fence,
/linux-master/drivers/gpu/drm/i915/gem/
H A Di915_gem_wait.c36 i915_gem_object_boost(struct dma_resv *resv, unsigned int flags) argument
45 * dma-resv contains a sequence such as 1:1, 1:2 instead of a reduced
57 dma_resv_iter_begin(&cursor, resv,
67 i915_gem_object_wait_reservation(struct dma_resv *resv, argument
75 i915_gem_object_boost(resv, flags);
77 dma_resv_iter_begin(&cursor, resv,
155 dma_resv_iter_begin(&cursor, obj->base.resv,
177 timeout = i915_gem_object_wait_reservation(obj->base.resv,
H A Di915_gem_dmabuf.c9 #include <linux/dma-resv.h>
226 exp_info.resv = obj->base.resv;
324 obj->base.resv = dma_buf->resv;
H A Di915_gem_ttm_move.c642 ret = i915_deps_add_resv(&deps, bo->base.resv, ctx);
726 ret = dma_resv_reserve_fences(src_bo->base.resv, 1);
730 ret = dma_resv_reserve_fences(dst_bo->base.resv, 1);
734 ret = i915_deps_add_resv(&deps, dst_bo->base.resv, &ctx);
738 ret = i915_deps_add_resv(&deps, src_bo->base.resv, &ctx);
752 dma_resv_add_fence(dst_bo->base.resv, copy_fence, DMA_RESV_USAGE_WRITE);
753 dma_resv_add_fence(src_bo->base.resv, copy_fence, DMA_RESV_USAGE_READ);
/linux-master/drivers/gpu/drm/etnaviv/
H A Detnaviv_gem.h9 #include <linux/dma-resv.h>
/linux-master/drivers/dma-buf/
H A Dudmabuf.c5 #include <linux/dma-resv.h>
67 dma_resv_assert_held(buf->resv);
81 dma_resv_assert_held(buf->resv);
H A Ddma-buf-sysfs-stats.c9 #include <linux/dma-resv.h>
/linux-master/arch/sparc/kernel/
H A Dpci_fire.c102 u64 resv[6]; member in struct:pci_msiq_entry
/linux-master/include/uapi/linux/
H A Dblkzoned.h96 * @resv: Padding for 8B alignment.
114 __u8 resv[4]; member in struct:blk_zone
/linux-master/io_uring/
H A Dtctx.c279 if (reg.resv) {
330 if (reg.resv || reg.data || reg.offset >= IO_RINGFD_REG_MAX) {
/linux-master/drivers/scsi/
H A Dipr.h1197 u8 resv; member in struct:ipr_sdt_entry
/linux-master/drivers/gpu/drm/i915/gt/
H A Dgen6_ppgtt.c340 /* grab the ppgtt resv to pin the object */
399 pd->pt.base->base.resv = i915_vm_resv_get(&ppgtt->base.vm);
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ids.h76 void amdgpu_pasid_free_delayed(struct dma_resv *resv,
H A Damdgpu_gem.h45 struct dma_resv *resv,
/linux-master/drivers/gpu/drm/ttm/
H A Dttm_bo_vm.c49 if (dma_resv_test_signaled(bo->base.resv, DMA_RESV_USAGE_KERNEL))
63 (void)dma_resv_wait_timeout(bo->base.resv,
66 dma_resv_unlock(bo->base.resv);
74 err = dma_resv_wait_timeout(bo->base.resv, DMA_RESV_USAGE_KERNEL, true,
125 if (unlikely(!dma_resv_trylock(bo->base.resv))) {
135 if (!dma_resv_lock_interruptible(bo->base.resv,
137 dma_resv_unlock(bo->base.resv);
144 if (dma_resv_lock_interruptible(bo->base.resv, NULL))
154 dma_resv_unlock(bo->base.resv);
344 dma_resv_unlock(bo->base.resv);
[all...]
/linux-master/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_page_dirty.c412 dma_resv_unlock(bo->base.resv);
465 dma_resv_unlock(bo->base.resv);
/linux-master/drivers/gpu/drm/vgem/
H A Dvgem_fence.c24 #include <linux/dma-resv.h>
131 struct dma_resv *resv; local
154 resv = obj->resv;
156 if (!dma_resv_test_signaled(resv, usage)) {
162 dma_resv_lock(resv, NULL);
163 ret = dma_resv_reserve_fences(resv, 1);
165 dma_resv_add_fence(resv, fence, arg->flags & VGEM_FENCE_WRITE ?
167 dma_resv_unlock(resv);

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