Searched refs:__raw_writel (Results 176 - 200 of 427) sorted by relevance

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/linux-master/include/asm-generic/
H A Dfb.h96 __raw_writel(b, addr);
/linux-master/arch/arm/mach-s3c/
H A Ds3c64xx.c245 __raw_writel(mask, S3C64XX_EINT0MASK);
254 __raw_writel(mask, S3C64XX_EINT0MASK);
259 __raw_writel((u32)data->chip_data, S3C64XX_EINT0PEND);
325 __raw_writel(ctrl, reg);
/linux-master/drivers/mtd/nand/raw/brcmnand/
H A Dbrcmnand.h71 __raw_writel(val, addr);
/linux-master/drivers/net/ethernet/sfc/falcon/
H A Dio.h81 __raw_writel((__force u32)value, efx->membase + reg);
126 __raw_writel((__force u32)value->u32[0], membase + addr);
127 __raw_writel((__force u32)value->u32[1], membase + addr + 4);
/linux-master/arch/mips/include/asm/
H A Dmips-gic.h68 __raw_writel(val, addr_gic_##name(intr)); \
121 __raw_writel(BIT(intr % 32), addr); \
145 __raw_writel(_val, addr); \
/linux-master/drivers/input/keyboard/
H A Dgoldfish_events.c58 __raw_writel(PAGE_EVBITS | type, addr + REG_SET_PAGE);
81 __raw_writel(PAGE_ABSDATA, addr + REG_SET_PAGE);
125 __raw_writel(PAGE_NAME, addr + REG_SET_PAGE);
/linux-master/arch/arm/mm/
H A Dcache-b15-rac.c65 __raw_writel(0, b15_rac_base + RAC_CONFIG0_REG);
74 __raw_writel(FLUSH_RAC, b15_rac_base + rac_flush_offset);
96 __raw_writel(val, b15_rac_base + RAC_CONFIG0_REG);
/linux-master/arch/mips/alchemy/common/
H A Ddbdma.c1007 __raw_writel(alchemy_dbdma_pm_data[i][0] & ~1, addr + 0x00);
1016 __raw_writel(0, addr + 0x0c);
1028 __raw_writel(alchemy_dbdma_pm_data[0][0], addr + 0x00);
1029 __raw_writel(alchemy_dbdma_pm_data[0][1], addr + 0x04);
1030 __raw_writel(alchemy_dbdma_pm_data[0][2], addr + 0x08);
1031 __raw_writel(alchemy_dbdma_pm_data[0][3], addr + 0x0c);
1036 __raw_writel(alchemy_dbdma_pm_data[i][0], addr + 0x00);
1037 __raw_writel(alchemy_dbdma_pm_data[i][1], addr + 0x04);
1038 __raw_writel(alchemy_dbdma_pm_data[i][2], addr + 0x08);
1039 __raw_writel(alchemy_dbdma_pm_dat
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/linux-master/drivers/net/ethernet/sfc/siena/
H A Dio.h98 __raw_writel((__force u32)value, efx->membase + reg);
143 __raw_writel((__force u32)value->u32[0], membase + addr);
144 __raw_writel((__force u32)value->u32[1], membase + addr + 4);
/linux-master/arch/hexagon/include/asm/
H A Dio.h147 #define __raw_writel writel macro
163 #define writel_relaxed __raw_writel
171 #define __raw_writel writel macro
/linux-master/drivers/tty/serial/
H A Dlantiq.c127 __raw_writel((tmp & ~clear) | set, reg);
167 __raw_writel(ASCWHBSTATE_CLRREN, port->membase + LTQ_ASC_WHBSTATE);
240 __raw_writel(ASC_IRNCR_TIR, port->membase + LTQ_ASC_IRNCR);
254 __raw_writel(ASC_IRNCR_EIR, port->membase + LTQ_ASC_IRNCR);
270 __raw_writel(ASC_IRNCR_RIR, port->membase + LTQ_ASC_IRNCR);
341 __raw_writel(0, port->membase + LTQ_ASC_PISEL);
342 __raw_writel(
346 __raw_writel(
363 __raw_writel(ASC_IRNREN_RX | ASC_IRNREN_ERR | ASC_IRNREN_TX,
377 __raw_writel(
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/linux-master/drivers/usb/gadget/udc/
H A Dat91_udc.c92 __raw_writel((val), (udc)->udp_baseaddr + (reg))
352 __raw_writel(csr, creg);
409 __raw_writel(csr, creg);
443 __raw_writel(csr, creg);
534 __raw_writel(tmp, ep->creg);
570 __raw_writel(0, ep->creg);
677 __raw_writel(tmp, ep->creg);
771 __raw_writel(csr, creg);
1021 __raw_writel(csr, creg);
1033 __raw_writel(cs
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/linux-master/arch/sh/kernel/cpu/sh4a/
H A Dsetup-sh7724.c845 __raw_writel(L2_CACHE_ENABLE, RAMCR);
1217 __raw_writel(sh7724_rstandby_state.mmselr, 0xff800020); /* MMSELR */
1218 __raw_writel(sh7724_rstandby_state.cs0bcr, 0xfec10004); /* CS0BCR */
1219 __raw_writel(sh7724_rstandby_state.cs4bcr, 0xfec10010); /* CS4BCR */
1220 __raw_writel(sh7724_rstandby_state.cs5abcr, 0xfec10014); /* CS5ABCR */
1221 __raw_writel(sh7724_rstandby_state.cs5bbcr, 0xfec10018); /* CS5BBCR */
1222 __raw_writel(sh7724_rstandby_state.cs6abcr, 0xfec1001c); /* CS6ABCR */
1223 __raw_writel(sh7724_rstandby_state.cs6bbcr, 0xfec10020); /* CS6BBCR */
1224 __raw_writel(sh7724_rstandby_state.cs4wcr, 0xfec10030); /* CS4WCR */
1225 __raw_writel(sh7724_rstandby_stat
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H A Dsetup-sh7757.c1187 __raw_writel(0xff000000, INTC_INTMSK0);
1190 __raw_writel(0xc0000000, INTC_INTMSK1);
1191 __raw_writel(0xfffefffe, INTC_INTMSK2);
1194 __raw_writel(__raw_readl(INTC_ICR0) & ~0x00c00000, INTC_ICR0);
1197 __raw_writel(__raw_readl(INTC_ICR0) | 0x00200000, INTC_ICR0);
1207 __raw_writel(__raw_readl(INTC_ICR0) | 0x00400000, INTC_ICR0);
1212 __raw_writel(__raw_readl(INTC_ICR0) | 0x00800000, INTC_ICR0);
1217 __raw_writel(0x40000000, INTC_INTMSKCLR1);
1218 __raw_writel(0x0000fffe, INTC_INTMSKCLR2);
1222 __raw_writel(
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/linux-master/arch/sparc/include/asm/
H A Dio_64.h85 #define __raw_writel __raw_writel macro
86 static inline void __raw_writel(u32 l, const volatile void __iomem *addr) function
336 __raw_writel(l, addr);
448 #define iowrite32be __raw_writel
/linux-master/drivers/cdrom/
H A Dgdrom.c390 __raw_writel(0x1fffff, GDROM_RESET_REG);
585 __raw_writel(page_to_phys(bio_page(req->bio)) + bio_offset(req->bio),
587 __raw_writel(block_cnt * GDROM_HARD_SECTOR, GDROM_DMA_LENGTH_REG);
588 __raw_writel(1, GDROM_DMA_DIRECTION_REG);
589 __raw_writel(1, GDROM_DMA_ENABLE_REG);
702 __raw_writel(0x8843407F, GDROM_DMA_ACCESS_CTRL_REG);
703 __raw_writel(9, GDROM_DMA_WAIT_REG); /* DMA word setting */
/linux-master/drivers/edac/
H A Dcpc925_edac.c390 __raw_writel(apimask, pdata->vbase + REG_APIMASK_OFFSET);
397 __raw_writel(mccr, pdata->vbase + REG_MCCR_OFFSET);
632 __raw_writel(apimask, dev_info->vbase + REG_APIMASK_OFFSET);
685 __raw_writel(ht_errctrl, dev_info->vbase + REG_ERRCTRL_OFFSET);
696 __raw_writel(ht_errctrl, dev_info->vbase + REG_ERRCTRL_OFFSET);
727 __raw_writel(BRGCTRL_DETSERR,
731 __raw_writel(HT_LINKCTRL_DETECTED,
736 __raw_writel(BRGCTRL_SECBUSRESET,
740 __raw_writel(ERRCTRL_RSP_ERR,
744 __raw_writel(HT_LINKERR_DETECTE
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/linux-master/arch/arm/mach-ep93xx/
H A Dcore.c101 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
102 __raw_writel(val, reg);
117 __raw_writel(0xaa, EP93XX_SYSCON_SWLOCK);
118 __raw_writel(val, EP93XX_SYSCON_DEVCFG);
178 __raw_writel(mcr, base + EP93XX_UART_MCR_OFFSET);
369 __raw_writel((0 << 1) | (0 << 0),
/linux-master/arch/mips/txx9/generic/
H A Dsetup.c335 __raw_writel(TXx9_TMWTMR_WDIS | TXx9_TMWTMR_TWC, &tmrptr->wtmr);
336 __raw_writel(0, &tmrptr->tcr);
338 __raw_writel(TXx9_TMWTMR_TWIE, &tmrptr->wtmr);
339 __raw_writel(1, &tmrptr->cpra); /* immediate */
340 __raw_writel(TXx9_TMTCR_TCE | TXx9_TMTCR_CCDE | TXx9_TMTCR_TMODE_WDOG,
415 __raw_writel(c, early_txx9_sio_port + TXX9_SITFIFO);
/linux-master/drivers/video/fbdev/omap2/omapfb/
H A Dvrfb.c73 __raw_writel(val, vrfb_base + SMS_ROT_CONTROL(ctx));
78 __raw_writel(val, vrfb_base + SMS_ROT_SIZE(ctx));
83 __raw_writel(val, vrfb_base + SMS_ROT_PHYSICAL_BA(ctx));
/linux-master/arch/arm/mach-mxs/
H A Dmach-mxs.c63 __raw_writel(mask, reg + MXS_SET_ADDR);
68 __raw_writel(mask, reg + MXS_CLR_ADDR);
73 __raw_writel(mask, reg + MXS_TOG_ADDR);
/linux-master/drivers/irqchip/
H A Dirq-bcm6345-l1.c150 __raw_writel(intc->cpus[cpu_idx]->enable_cache[word],
162 __raw_writel(intc->cpus[cpu_idx]->enable_cache[word],
260 __raw_writel(0, cpu->map_base + reg_enable(intc, i));
/linux-master/arch/sh/mm/
H A Dtlbflush_32.c134 __raw_writel(__raw_readl(MMUCR) | MMUCR_TI, MMUCR);
/linux-master/drivers/net/wireless/intersil/p54/
H A Dp54pci.h87 #define P54P_WRITE(r, val) __raw_writel((__force u32)(__le32)(val), &priv->map->r)
/linux-master/drivers/sh/clk/
H A Dcpg.c415 __raw_writel(0, clk->mapping->base);
426 __raw_writel((value << 16) | 0x3, clk->mapping->base);
437 __raw_writel(0, clk->mapping->base);
439 __raw_writel(idx << 16, clk->mapping->base);

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