Searched refs:reg (Results 126 - 150 of 7209) sorted by relevance

1234567891011>>

/linux-master/drivers/mfd/
H A Dpcf50633-gpio.c35 u8 reg; local
37 reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
39 return pcf50633_reg_set_bit_mask(pcf, reg, 0x07, val);
45 u8 reg, val; local
47 reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
48 val = pcf50633_reg_read(pcf, reg) & 0x07;
56 u8 val, reg; local
58 reg = gpio - PCF50633_GPIO1 + PCF50633_REG_GPIO1CFG;
61 return pcf50633_reg_set_bit_mask(pcf, reg, 1 << 3, val);
67 u8 reg, va local
79 u8 reg, val, mask; local
[all...]
H A Dwm8350-irq.c36 int reg; member in struct:wm8350_irq_data
44 .reg = WM8350_OVER_CURRENT_INT_OFFSET,
50 .reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
55 .reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
60 .reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
65 .reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
70 .reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
75 .reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
80 .reg = WM8350_UNDER_VOLTAGE_INT_OFFSET,
85 .reg
[all...]
/linux-master/drivers/gpu/drm/i915/display/
H A Dintel_dkl_phy.c24 dkl_phy_set_hip_idx(struct drm_i915_private *i915, struct intel_dkl_phy_reg reg) argument
26 enum tc_port tc_port = DKL_REG_TC_PORT(reg);
32 HIP_INDEX_VAL(tc_port, reg.bank_idx));
38 * @reg: Dekel PHY register
40 * Read the @reg Dekel PHY register.
45 intel_dkl_phy_read(struct drm_i915_private *i915, struct intel_dkl_phy_reg reg) argument
51 dkl_phy_set_hip_idx(i915, reg);
52 val = intel_de_read(i915, DKL_REG_MMIO(reg));
62 * @reg: Dekel PHY register
65 * Write @val to the @reg Deke
68 intel_dkl_phy_write(struct drm_i915_private *i915, struct intel_dkl_phy_reg reg, u32 val) argument
89 intel_dkl_phy_rmw(struct drm_i915_private *i915, struct intel_dkl_phy_reg reg, u32 clear, u32 set) argument
107 intel_dkl_phy_posting_read(struct drm_i915_private *i915, struct intel_dkl_phy_reg reg) argument
[all...]
/linux-master/drivers/memory/tegra/
H A Dtegra210.c21 .reg = 0x228,
25 .reg = 0x2e8,
37 .reg = 0x228,
41 .reg = 0x2f4,
53 .reg = 0x228,
57 .reg = 0x2e8,
69 .reg = 0x228,
73 .reg = 0x2f4,
85 .reg = 0x228,
89 .reg
[all...]
/linux-master/drivers/clk/berlin/
H A Dberlin2-avpll.c34 /* BG2/BG2CDs VCO_B has an additional shift of 4 for its VCO_CTRL0 reg */
116 u32 reg; local
118 reg = readl_relaxed(vco->base + VCO_CTRL0);
120 reg >>= 4;
122 return !!(reg & VCO_POWERUP);
128 u32 reg; local
130 reg = readl_relaxed(vco->base + VCO_CTRL0);
132 reg |= VCO_POWERUP << 4;
134 reg |= VCO_POWERUP;
135 writel_relaxed(reg, vc
143 u32 reg; local
159 u32 reg, refdiv, fbdiv; local
215 u32 reg; local
229 u32 reg; local
241 u32 reg; local
255 u32 reg, div_av2, div_av3, divider = 1; local
[all...]
/linux-master/drivers/net/ethernet/sunplus/
H A Dspl2sw_mac.c18 u32 reg; local
26 reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL);
27 reg |= MAC_DIS_SOC1_CPU | MAC_DIS_SOC0_CPU;
28 writel(reg, comm->l2sw_reg_base + L2SW_CPU_CNTL);
32 reg = readl(comm->l2sw_reg_base + L2SW_PORT_CNTL0);
33 reg |= FIELD_PREP(MAC_DIS_PORT, ~comm->enable);
34 writel(reg, comm->l2sw_reg_base + L2SW_PORT_CNTL0);
39 u32 reg; local
42 reg = readl(comm->l2sw_reg_base + L2SW_CPU_CNTL);
43 reg
56 u32 reg; local
91 u32 reg; local
126 u32 reg; local
222 u32 mask, reg, rx_mode; local
[all...]
/linux-master/arch/powerpc/boot/dts/fsl/
H A Dqoriq-bman1-portals.dtsi42 reg = <0x0 0x4000>, <0x100000 0x1000>;
47 reg = <0x4000 0x4000>, <0x101000 0x1000>;
52 reg = <0x8000 0x4000>, <0x102000 0x1000>;
57 reg = <0xc000 0x4000>, <0x103000 0x1000>;
62 reg = <0x10000 0x4000>, <0x104000 0x1000>;
67 reg = <0x14000 0x4000>, <0x105000 0x1000>;
72 reg = <0x18000 0x4000>, <0x106000 0x1000>;
77 reg = <0x1c000 0x4000>, <0x107000 0x1000>;
82 reg = <0x20000 0x4000>, <0x108000 0x1000>;
87 reg
[all...]
H A Dqoriq-raid1.0-0.dtsi39 reg = <0x320000 0x10000>;
46 reg = <0x1000 0x1000>;
51 reg = <0x0 0x400>;
58 reg = <0x400 0x400>;
68 reg = <0x2000 0x1000>;
73 reg = <0x0 0x400>;
80 reg = <0x400 0x400>;
/linux-master/drivers/hwmon/
H A Dadt7310.c40 #define AD7310_COMMAND(reg) (adt7310_reg_table[(reg)] << ADT7310_CMD_REG_OFFSET)
42 static int adt7310_spi_read_word(struct spi_device *spi, u8 reg) argument
44 return spi_w8r16be(spi, AD7310_COMMAND(reg) | ADT7310_CMD_READ);
47 static int adt7310_spi_write_word(struct spi_device *spi, u8 reg, u16 data) argument
51 buf[0] = AD7310_COMMAND(reg);
57 static int adt7310_spi_read_byte(struct spi_device *spi, u8 reg) argument
59 return spi_w8r8(spi, AD7310_COMMAND(reg) | ADT7310_CMD_READ);
62 static int adt7310_spi_write_byte(struct spi_device *spi, u8 reg, u8 data) argument
66 buf[0] = AD7310_COMMAND(reg);
72 adt7310_regmap_is_volatile(struct device *dev, unsigned int reg) argument
83 adt7310_reg_read(void *context, unsigned int reg, unsigned int *val) argument
105 adt7310_reg_write(void *context, unsigned int reg, unsigned int val) argument
[all...]
/linux-master/drivers/acpi/pmic/
H A Dintel_pmic_bytcrc.c22 .reg = ??,
27 .reg = 0x63,
32 .reg = 0x62,
37 .reg = 0x64,
42 .reg = 0x6a,
47 .reg = 0x6b,
52 .reg = 0x6c,
57 .reg = 0x6d,
62 .reg = ??,
67 .reg
188 intel_crc_pmic_get_power(struct regmap *regmap, int reg, int bit, u64 *value) argument
200 intel_crc_pmic_update_power(struct regmap *regmap, int reg, int bit, bool on) argument
220 intel_crc_pmic_get_raw_temp(struct regmap *regmap, int reg) argument
235 intel_crc_pmic_update_aux(struct regmap *regmap, int reg, int raw) argument
241 intel_crc_pmic_get_policy(struct regmap *regmap, int reg, int bit, u64 *value) argument
252 intel_crc_pmic_update_policy(struct regmap *regmap, int reg, int bit, int enable) argument
[all...]
H A Dintel_pmic.h9 int reg; /* corresponding thermal register */ member in struct:pmic_table
14 int (*get_power)(struct regmap *r, int reg, int bit, u64 *value);
15 int (*update_power)(struct regmap *r, int reg, int bit, bool on);
16 int (*get_raw_temp)(struct regmap *r, int reg);
17 int (*update_aux)(struct regmap *r, int reg, int raw_temp);
18 int (*get_policy)(struct regmap *r, int reg, int bit, u64 *value);
19 int (*update_policy)(struct regmap *r, int reg, int bit, int enable);
/linux-master/sound/hda/
H A Dhdac_regmap.c36 #define get_verb(reg) (((reg) >> 8) & 0xfff)
38 static bool hda_volatile_reg(struct device *dev, unsigned int reg) argument
41 unsigned int verb = get_verb(reg);
65 static bool hda_writeable_reg(struct device *dev, unsigned int reg) argument
68 unsigned int verb = get_verb(reg);
114 static bool hda_readable_reg(struct device *dev, unsigned int reg) argument
117 unsigned int verb = get_verb(reg);
136 return hda_writeable_reg(dev, reg);
147 static bool is_stereo_amp_verb(unsigned int reg) argument
156 hda_reg_read_stereo_amp(struct hdac_device *codec, unsigned int reg, unsigned int *val) argument
174 hda_reg_write_stereo_amp(struct hdac_device *codec, unsigned int reg, unsigned int val) argument
204 hda_reg_read_coef(struct hdac_device *codec, unsigned int reg, unsigned int *val) argument
222 hda_reg_write_coef(struct hdac_device *codec, unsigned int reg, unsigned int val) argument
240 hda_reg_read(void *context, unsigned int reg, unsigned int *val) argument
279 hda_reg_write(void *context, unsigned int reg, unsigned int val) argument
425 reg_raw_write(struct hdac_device *codec, unsigned int reg, unsigned int val) argument
459 snd_hdac_regmap_write_raw(struct hdac_device *codec, unsigned int reg, unsigned int val) argument
466 reg_raw_read(struct hdac_device *codec, unsigned int reg, unsigned int *val, bool uncached) argument
480 __snd_hdac_regmap_read_raw(struct hdac_device *codec, unsigned int reg, unsigned int *val, bool uncached) argument
495 snd_hdac_regmap_read_raw(struct hdac_device *codec, unsigned int reg, unsigned int *val) argument
505 snd_hdac_regmap_read_raw_uncached(struct hdac_device *codec, unsigned int reg, unsigned int *val) argument
511 reg_raw_update(struct hdac_device *codec, unsigned int reg, unsigned int mask, unsigned int val) argument
549 snd_hdac_regmap_update_raw(struct hdac_device *codec, unsigned int reg, unsigned int mask, unsigned int val) argument
556 reg_raw_update_once(struct hdac_device *codec, unsigned int reg, unsigned int mask, unsigned int val) argument
583 snd_hdac_regmap_update_raw_once(struct hdac_device *codec, unsigned int reg, unsigned int mask, unsigned int val) argument
[all...]
/linux-master/arch/mips/include/asm/mach-lantiq/
H A Dlantiq.h13 /* generic reg access functions */
14 #define ltq_r32(reg) __raw_readl(reg)
15 #define ltq_w32(val, reg) __raw_writel(val, reg)
16 #define ltq_w32_mask(clear, set, reg) \
17 ltq_w32((ltq_r32(reg) & ~(clear)) | (set), reg)
18 #define ltq_r8(reg) __raw_readb(reg)
[all...]
/linux-master/drivers/staging/sm750fb/
H A Dddk750_chip.c87 unsigned int reg, divisor; local
108 reg = peek32(CURRENT_GATE) & ~CURRENT_GATE_M2XCLK_MASK;
112 reg |= CURRENT_GATE_M2XCLK_DIV_1;
115 reg |= CURRENT_GATE_M2XCLK_DIV_2;
118 reg |= CURRENT_GATE_M2XCLK_DIV_3;
121 reg |= CURRENT_GATE_M2XCLK_DIV_4;
125 sm750_set_current_gate(reg);
139 unsigned int reg, divisor; local
160 reg = peek32(CURRENT_GATE) & ~CURRENT_GATE_MCLK_MASK;
164 reg |
183 unsigned int reg; local
215 unsigned int reg; local
[all...]
/linux-master/arch/arm/mach-orion5x/
H A Dboard-mss2.c68 u32 reg; local
73 reg = readl(RSTOUTn_MASK);
74 reg |= 1 << 2;
75 writel(reg, RSTOUTn_MASK);
77 reg = readl(CPU_SOFT_RESET);
78 reg |= 1;
79 writel(reg, CPU_SOFT_RESET);
/linux-master/drivers/clk/imx/
H A Dclk.h107 #define clk_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \
109 to_clk(clk_hw_register_gate2(dev, name, parent_name, flags, reg, bit_idx, \
115 #define imx_clk_pfd(name, parent_name, reg, idx) \
116 to_clk(imx_clk_hw_pfd(name, parent_name, reg, idx))
118 #define imx_clk_gate_exclusive(name, parent, reg, shift, exclusive_mask) \
119 to_clk(imx_clk_hw_gate_exclusive(name, parent, reg, shift, exclusive_mask))
127 #define imx_clk_divider(name, parent, reg, shift, width) \
128 to_clk(imx_clk_hw_divider(name, parent, reg, shift, width))
130 #define imx_clk_divider_flags(name, parent, reg, shift, width, flags) \
131 to_clk(imx_clk_hw_divider_flags(name, parent, reg, shif
356 imx_clk_hw_divider_closest(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width) argument
365 __imx_clk_hw_divider(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 width, unsigned long flags) argument
374 __imx_clk_hw_gate(const char *name, const char *parent, void __iomem *reg, u8 shift, unsigned long flags, unsigned long clk_gate_flags) argument
383 __imx_clk_hw_gate2(const char *name, const char *parent, void __iomem *reg, u8 shift, u8 cgr_val, unsigned long flags, unsigned int *share_count) argument
392 __imx_clk_hw_mux(const char *name, void __iomem *reg, u8 shift, u8 width, const char * const *parents, int num_parents, unsigned long flags, unsigned long clk_mux_flags) argument
[all...]
/linux-master/drivers/net/wireless/ralink/rt2x00/
H A Drt2400pci.c48 u32 reg; local
56 if (WAIT_FOR_BBP(rt2x00dev, &reg)) {
57 reg = 0;
58 rt2x00_set_field32(&reg, BBPCSR_VALUE, value);
59 rt2x00_set_field32(&reg, BBPCSR_REGNUM, word);
60 rt2x00_set_field32(&reg, BBPCSR_BUSY, 1);
61 rt2x00_set_field32(&reg, BBPCSR_WRITE_CONTROL, 1);
63 rt2x00mmio_register_write(rt2x00dev, BBPCSR, reg);
72 u32 reg; local
82 * doesn't become available in time, reg wil
106 u32 reg; local
131 u32 reg; local
146 u32 reg = 0; local
195 u32 reg; local
208 u32 reg; local
226 u32 reg; local
254 u32 reg; local
283 u32 reg; local
317 u32 reg; local
501 u32 reg; local
517 u32 reg; local
559 u32 reg; local
573 u32 reg; local
630 u32 reg; local
653 u32 reg; local
679 u32 reg; local
760 u32 reg; local
812 u32 reg; local
961 u32 reg; local
1024 u32 reg, reg2; local
1169 u32 reg; local
1307 u32 reg; local
1326 u32 reg; local
1372 u32 reg, mask; local
1433 u32 reg; local
1469 u32 reg; local
1610 u32 reg; local
1688 u32 reg; local
1701 u32 reg; local
[all...]
/linux-master/fs/ocfs2/cluster/
H A Dheartbeat.c264 static inline struct block_device *reg_bdev(struct o2hb_region *reg) argument
266 return reg->hr_bdev_file ? file_bdev(reg->hr_bdev_file) : NULL;
289 struct o2hb_region *reg = local
294 "milliseconds\n", reg_bdev(reg),
295 jiffies_to_msecs(jiffies - reg->hr_last_timeout_start));
299 if (test_bit(reg->hr_region_num, o2hb_quorum_region_bitmap))
300 set_bit(reg->hr_region_num, o2hb_failed_region_bitmap);
321 static void o2hb_arm_timeout(struct o2hb_region *reg) argument
324 if (atomic_read(&reg
346 o2hb_disarm_timeout(struct o2hb_region *reg) argument
374 struct o2hb_region *reg; local
440 struct o2hb_region *reg = data; local
458 struct o2hb_region *reg = data; local
508 o2hb_setup_one_bio(struct o2hb_region *reg, struct o2hb_bio_wait_ctxt *wc, unsigned int *current_slot, unsigned int max_slots, blk_opf_t opf) argument
560 o2hb_read_slots(struct o2hb_region *reg, unsigned int begin_slot, unsigned int max_slots) argument
594 o2hb_issue_node_write(struct o2hb_region *reg, struct o2hb_bio_wait_ctxt *write_wc) argument
621 o2hb_compute_block_crc_le(struct o2hb_region *reg, struct o2hb_disk_heartbeat_block *hb_block) argument
649 o2hb_verify_crc(struct o2hb_region *reg, struct o2hb_disk_heartbeat_block *hb_block) argument
667 o2hb_check_own_slot(struct o2hb_region *reg) argument
706 o2hb_prepare_block(struct o2hb_region *reg, u64 generation) argument
843 o2hb_set_quorum_device(struct o2hb_region *reg) argument
886 o2hb_check_slot(struct o2hb_region *reg, struct o2hb_disk_slot *slot) argument
1078 o2hb_do_disk_heartbeat(struct o2hb_region *reg) argument
1198 struct o2hb_region *reg = data; local
1277 struct o2hb_region *reg; local
1497 struct o2hb_region *reg = to_o2hb_region(item); local
1531 o2hb_read_block_input(struct o2hb_region *reg, const char *page, unsigned long *ret_bytes, unsigned int *ret_bits) argument
1567 struct o2hb_region *reg = to_o2hb_region(item); local
1596 struct o2hb_region *reg = to_o2hb_region(item); local
1622 struct o2hb_region *reg = to_o2hb_region(item); local
1651 o2hb_init_region_params(struct o2hb_region *reg) argument
1664 o2hb_map_slot_data(struct o2hb_region *reg) argument
1727 o2hb_populate_slot_data(struct o2hb_region *reg) argument
1763 struct o2hb_region *reg = to_o2hb_region(item); local
1917 struct o2hb_region *reg = to_o2hb_region(item); local
1970 o2hb_debug_region_init(struct o2hb_region *reg, struct dentry *parent) argument
2002 struct o2hb_region *reg = NULL; local
2073 struct o2hb_region *reg = to_o2hb_region(item); local
2269 struct o2hb_region *reg; local
2321 struct o2hb_region *reg; local
2506 struct o2hb_region *reg; local
2521 struct o2hb_region *reg; local
[all...]
/linux-master/drivers/usb/dwc3/
H A Dulpi.c28 u32 reg; local
36 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYCFG(0));
37 if (reg & DWC3_GUSB2PHYCFG_SUSPHY)
42 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
43 if (reg & DWC3_GUSB2PHYACC_DONE)
54 u32 reg; local
57 reg = DWC3_GUSB2PHYACC_NEWREGREQ | DWC3_ULPI_ADDR(addr);
58 dwc3_writel(dwc->regs, DWC3_GUSB2PHYACC(0), reg);
64 reg = dwc3_readl(dwc->regs, DWC3_GUSB2PHYACC(0));
66 return DWC3_GUSB2PHYACC_DATA(reg);
72 u32 reg; local
[all...]
/linux-master/drivers/input/misc/
H A Dadxl34x-spi.c21 #define ADXL34X_WRITECMD(reg) (reg & 0x3F)
22 #define ADXL34X_READCMD(reg) (ADXL34X_CMD_READ | (reg & 0x3F))
23 #define ADXL34X_READMB_CMD(reg) (ADXL34X_CMD_READ | ADXL34X_CMD_MULTB \
24 | (reg & 0x3F))
26 static int adxl34x_spi_read(struct device *dev, unsigned char reg) argument
31 cmd = ADXL34X_READCMD(reg);
37 unsigned char reg, unsigned char val)
42 buf[0] = ADXL34X_WRITECMD(reg);
36 adxl34x_spi_write(struct device *dev, unsigned char reg, unsigned char val) argument
48 adxl34x_spi_read_block(struct device *dev, unsigned char reg, int count, void *buf) argument
[all...]
/linux-master/tools/testing/selftests/powerpc/ptrace/
H A Dptrace-tar.c17 unsigned long reg[3]; local
34 reg[0] = mfspr(SPRN_TAR);
35 reg[1] = mfspr(SPRN_PPR);
36 reg[2] = mfspr(SPRN_DSCR);
39 user_read, reg[0], reg[1], reg[2]);
45 ret = validate_tar_registers(reg, TAR_2, PPR_2, DSCR_2);
53 unsigned long reg[3]; local
56 FAIL_IF(show_tar_registers(child, reg));
[all...]
/linux-master/drivers/soc/tegra/
H A Dflowctrl.c74 unsigned int reg; local
77 reg = flowctrl_read_cpu_csr(cpuid);
81 reg &= ~TEGRA20_FLOW_CTRL_CSR_WFE_BITMAP;
83 reg &= ~TEGRA20_FLOW_CTRL_CSR_WFI_BITMAP;
85 reg |= TEGRA20_FLOW_CTRL_CSR_WFE_CPU0 << cpuid;
91 reg &= ~TEGRA30_FLOW_CTRL_CSR_WFE_BITMAP;
93 reg &= ~TEGRA30_FLOW_CTRL_CSR_WFI_BITMAP;
106 reg |= TEGRA20_FLOW_CTRL_CSR_WFE_CPU0 << cpuid;
109 reg |= TEGRA30_FLOW_CTRL_CSR_WFI_CPU0 << cpuid;
113 reg |
130 unsigned int reg; local
[all...]
/linux-master/arch/mips/bcm63xx/
H A Dtimer.c59 u32 reg; local
67 reg = bcm_timer_readl(TIMER_CTLx_REG(id));
68 reg |= TIMER_CTL_ENABLE_MASK;
69 bcm_timer_writel(reg, TIMER_CTLx_REG(id));
71 reg = bcm_timer_readl(TIMER_IRQSTAT_REG);
72 reg |= TIMER_IRQSTAT_TIMER_IR_EN(id);
73 bcm_timer_writel(reg, TIMER_IRQSTAT_REG);
83 u32 reg; local
91 reg = bcm_timer_readl(TIMER_CTLx_REG(id));
92 reg
153 u32 reg, countdown; local
184 u32 reg; local
[all...]
/linux-master/drivers/fsi/
H A Dfsi-master-hub.c85 __be32 reg; local
91 reg = cpu_to_be32(0x80000000 >> bit);
95 &reg, 4);
97 rc = fsi_device_write(hub->upstream, FSI_MSENP0 + (4 * idx), &reg, 4);
127 __be32 reg; local
130 reg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK
132 rc = fsi_device_write(dev, FSI_MRESP0, &reg, sizeof(reg));
137 reg = cpu_to_be32(FSI_MRESP_RST_ALL_MASTER | FSI_MRESP_RST_ALL_LINK
139 rc = fsi_device_write(dev, FSI_MRESP0, &reg, sizeo
199 uint32_t reg, links; local
[all...]
/linux-master/drivers/net/dsa/b53/
H A Db53_mmap.c33 static int b53_mmap_read8(struct b53_device *dev, u8 page, u8 reg, u8 *val) argument
38 *val = readb(regs + (page << 8) + reg);
43 static int b53_mmap_read16(struct b53_device *dev, u8 page, u8 reg, u16 *val) argument
48 if (WARN_ON(reg % 2))
52 *val = ioread16be(regs + (page << 8) + reg);
54 *val = readw(regs + (page << 8) + reg);
59 static int b53_mmap_read32(struct b53_device *dev, u8 page, u8 reg, u32 *val) argument
64 if (WARN_ON(reg % 4))
68 *val = ioread32be(regs + (page << 8) + reg);
70 *val = readl(regs + (page << 8) + reg);
75 b53_mmap_read48(struct b53_device *dev, u8 page, u8 reg, u64 *val) argument
114 b53_mmap_read64(struct b53_device *dev, u8 page, u8 reg, u64 *val) argument
136 b53_mmap_write8(struct b53_device *dev, u8 page, u8 reg, u8 value) argument
146 b53_mmap_write16(struct b53_device *dev, u8 page, u8 reg, u16 value) argument
163 b53_mmap_write32(struct b53_device *dev, u8 page, u8 reg, u32 value) argument
180 b53_mmap_write48(struct b53_device *dev, u8 page, u8 reg, u64 value) argument
203 b53_mmap_write64(struct b53_device *dev, u8 page, u8 reg, u64 value) argument
220 b53_mmap_phy_read16(struct b53_device *dev, int addr, int reg, u16 *value) argument
226 b53_mmap_phy_write16(struct b53_device *dev, int addr, int reg, u16 value) argument
276 u32 reg; local
[all...]

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1234567891011>>