Searched refs:intr (Results 126 - 150 of 528) sorted by relevance

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/linux-master/arch/mips/include/asm/octeon/
H A Dcvmx-ciu3-defs.h98 uint64_t intr : 1; member in struct:cvmx_ciu3_destx_io_int::cvmx_ciu3_destx_io_int_s
100 uint64_t intr : 1;
119 uint64_t intr : 1; member in struct:cvmx_ciu3_destx_pp_int::cvmx_ciu3_destx_pp_int_s
121 uint64_t intr : 1;
151 uint64_t intr : 1; member in struct:cvmx_ciu3_idtx_ctl::cvmx_ciu3_idtx_ctl_s
157 uint64_t intr : 1;
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/
H A Dxtensa.c64 u32 intr = nvkm_rd32(device, base + 0xc20); local
68 if (intr & 0x10)
70 nvkm_wr32(device, base + 0xc20, intr);
71 intr = nvkm_rd32(device, base + 0xc20);
72 if (unk104 == 0x10001 && unk10c == 0x200 && chan && !intr) {
172 .intr = nvkm_xtensa_intr,
/linux-master/drivers/net/wireless/mediatek/mt76/mt7615/
H A Dsdio.c53 static int mt7663s_parse_intr(struct mt76_dev *dev, struct mt76s_intr *intr) argument
66 intr->isr = irq_data->isr;
67 intr->rec_mb = irq_data->rec_mb;
68 intr->tx.wtqcr = irq_data->tx.wtqcr;
69 intr->rx.num = irq_data->rx.num;
71 intr->rx.len[i] = irq_data->rx.len[i];
/linux-master/include/linux/
H A Ddma-fence.h222 * Must return -ERESTARTSYS if the wait is intr = true and the wait was
229 bool intr, signed long timeout);
397 bool intr, signed long timeout);
607 bool intr, signed long timeout);
610 bool intr, signed long timeout,
616 * @intr: if true, do an interruptible wait
628 static inline signed long dma_fence_wait(struct dma_fence *fence, bool intr) argument
636 ret = dma_fence_wait_timeout(fence, intr, MAX_SCHEDULE_TIMEOUT);
/linux-master/drivers/net/ethernet/cisco/enic/
H A Denic_main.c456 vnic_intr_mask(&enic->intr[io_intr]);
460 vnic_intr_unmask(&enic->intr[io_intr]);
466 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
470 vnic_intr_return_all_credits(&enic->intr[err_intr]);
480 vnic_intr_unmask(&enic->intr[io_intr]);
522 unsigned int intr = enic_msix_err_intr(enic); local
524 vnic_intr_return_all_credits(&enic->intr[intr]);
536 unsigned int intr = enic_msix_notify_intr(enic); local
539 vnic_intr_return_all_credits(&enic->intr[int
1448 unsigned int intr = enic_msix_rq_intr(enic, rq->index); local
1510 unsigned int intr = ENIC_LEGACY_IO_INTR; local
1609 unsigned int intr; local
1638 unsigned int intr = enic_msix_rq_intr(enic, rq); local
1726 unsigned int i, intr; local
2074 unsigned int i, intr; local
[all...]
/linux-master/drivers/dma-buf/
H A Ddma-fence.c486 * @intr: if true, do an interruptible wait
501 dma_fence_wait_timeout(struct dma_fence *fence, bool intr, signed long timeout) argument
516 ret = fence->ops->wait(fence, intr, timeout);
518 ret = dma_fence_default_wait(fence, intr, timeout);
752 * @intr: if true, do an interruptible wait
761 dma_fence_default_wait(struct dma_fence *fence, bool intr, signed long timeout) argument
772 if (intr && signal_pending(current)) {
787 if (intr)
796 if (ret > 0 && intr && signal_pending(current))
832 * @intr
848 dma_fence_wait_any_timeout(struct dma_fence **fences, uint32_t count, bool intr, signed long timeout, uint32_t *idx) argument
[all...]
/linux-master/drivers/net/wireless/mediatek/mt76/
H A Dmt76x02_mmio.c262 u32 intr, mask; local
264 intr = mt76_rr(dev, MT_INT_SOURCE_CSR);
265 intr &= dev->mt76.mmio.irqmask;
266 mt76_wr(dev, MT_INT_SOURCE_CSR, intr);
271 trace_dev_irq(&dev->mt76, intr, dev->mt76.mmio.irqmask);
273 mask = intr & (MT_INT_RX_DONE_ALL | MT_INT_GPTIMER);
274 if (intr & (MT_INT_TX_DONE_ALL | MT_INT_TX_STAT))
279 if (intr & MT_INT_RX_DONE(0))
282 if (intr & MT_INT_RX_DONE(1))
285 if (intr
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/fault/
H A Dgv100.c79 const u32 intr = buffer->id ? 0x08000000 : 0x20000000; local
81 nvkm_mask(device, 0x100a2c, intr, intr);
83 nvkm_mask(device, 0x100a34, intr, intr);
182 nvkm_debug(subdev, "intr %08x\n", stat);
219 .intr = gv100_fault_intr,
226 .buffer.intr = gv100_fault_buffer_intr,
H A Dtu102.c140 struct nvkm_intr *intr = &device->vfn->intr; local
143 ret = nvkm_inth_add(intr, nvkm_rd32(device, 0x100ee0) & 0x0000ffff,
150 ret = nvkm_inth_add(intr, nvkm_rd32(device, 0x100ee4 + (i * 4)) >> 16,
171 .buffer.intr = tu102_fault_buffer_intr,
/linux-master/drivers/macintosh/
H A Dmacio-adb.c29 struct preg intr; member in struct:adb_regs
41 /* Bits in intr and intr_enb registers */
117 out_8(&adb->intr.r, 0);
219 if (in_8(&adb->intr.r) & TAG) {
238 out_8(&adb->intr.r, 0);
241 if (in_8(&adb->intr.r) & DFB) {
265 out_8(&adb->intr.r, 0);
289 if (in_8(&adb->intr.r) != 0)
/linux-master/drivers/net/wireless/mediatek/mt76/mt7921/
H A Dsdio.c57 static int mt7921s_parse_intr(struct mt76_dev *dev, struct mt76s_intr *intr) argument
74 intr->isr = irq_data->isr;
75 intr->rec_mb = irq_data->rec_mb;
76 intr->tx.wtqcr = irq_data->tx.wtqcr;
77 intr->rx.num = irq_data->rx.num;
80 intr->rx.len[0] = irq_data->rx.len0;
82 intr->rx.len[1] = irq_data->rx.len1;
/linux-master/drivers/scsi/fnic/
H A Dfnic_isr.c32 vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_NOTIFY]);
37 vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_ERR]);
43 vnic_intr_return_all_credits(&fnic->intr[FNIC_INTX_DUMMY]);
51 vnic_intr_return_credits(&fnic->intr[FNIC_INTX_WQ_RQ_COPYWQ],
53 1 /* unmask intr */,
54 1 /* reset intr timer */);
72 vnic_intr_return_credits(&fnic->intr[0],
74 1 /* unmask intr */,
75 1 /* reset intr timer */);
89 vnic_intr_return_credits(&fnic->intr[FNIC_MSIX_R
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/fifo/
H A Dgf100.c365 .intr = gf100_runq_intr,
678 u32 intr = nvkm_rd32(device, 0x00254c); local
679 u32 code = intr & 0x000000ff;
741 if (runq->func->intr(runq, NULL))
755 u32 intr = nvkm_rd32(device, 0x002a00); local
757 if (intr & 0x10000000) {
759 intr &= ~0x10000000;
762 if (intr) {
763 nvkm_error(subdev, "RUNLIST %08x\n", intr);
764 nvkm_wr32(device, 0x002a00, intr);
773 u32 intr = nvkm_rd32(device, 0x0025a8 + (engn * 0x04)); local
815 u32 intr = nvkm_rd32(device, 0x00252c); local
828 u32 intr = nvkm_rd32(device, 0x00256c); local
835 u32 intr = nvkm_rd32(device, 0x00258c); local
[all...]
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/gpio/
H A Dnv50.c99 u32 intr = nvkm_rd32(device, 0x00e054); local
100 u32 stat = nvkm_rd32(device, 0x00e050) & intr;
103 nvkm_wr32(device, 0x00e054, intr);
/linux-master/drivers/gpu/drm/nouveau/nvkm/engine/disp/
H A Dgp102.c67 .intr = gf119_disp_chan_intr,
134 .intr = gf119_disp_chan_intr,
178 .intr = gf119_disp_intr,
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/mc/
H A Dbase.c139 if (mc->func->intr) {
140 ret = nvkm_intr_add(mc->func->intr, mc->func->intrs, &mc->subdev,
141 mc->func->intr_nonstall ? 2 : 1, &mc->intr);
/linux-master/drivers/gpu/drm/nouveau/nvkm/core/
H A Dengine.c85 if (engine->func->intr)
86 engine->func->intr(engine);
161 .intr = nvkm_engine_intr,
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/top/
H A Dbase.c38 info->intr = -1;
84 if (info->type == type && info->inst == inst && info->intr >= 0)
85 return BIT(info->intr);
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/pmu/
H A Dbase.c74 if (!pmu->func->intr)
76 pmu->func->intr(pmu);
122 .intr = nvkm_pmu_intr,
/linux-master/drivers/gpu/drm/vmwgfx/
H A Dvmwgfx_validation.c419 * @intr: Use interruptible waits when possible.
425 bool intr)
435 ret = vmw_resource_reserve(res, intr, val->no_buffer_needed);
545 * @intr: Whether to perform waits interruptible if possible.
550 int vmw_validation_bo_validate(struct vmw_validation_context *ctx, bool intr) argument
558 ret = vmw_validation_bo_validate_single(entry->base.bo, intr);
591 * @intr: Whether to perform waits interruptible if possible.
599 int vmw_validation_res_validate(struct vmw_validation_context *ctx, bool intr) argument
608 ret = vmw_resource_validate(res, intr, val->dirty_set &&
699 * @intr
424 vmw_validation_res_reserve(struct vmw_validation_context *ctx, bool intr) argument
709 vmw_validation_prepare(struct vmw_validation_context *ctx, struct mutex *mutex, bool intr) argument
[all...]
/linux-master/drivers/gpu/drm/radeon/
H A Dradeon_fence.c464 * @intr: use interruptable sleep
469 * @intr selects whether to use interruptable (true) or non-interruptable
477 u64 *target_seq, bool intr,
495 if (intr) {
523 * @intr: use interruptible sleep
526 * @intr selects whether to use interruptable (true) or non-interruptable
532 long radeon_fence_wait_timeout(struct radeon_fence *fence, bool intr, long timeout) argument
544 return dma_fence_wait(&fence->base, intr);
547 r = radeon_fence_wait_seq_timeout(fence->rdev, seq, intr, timeout);
559 * @intr
476 radeon_fence_wait_seq_timeout(struct radeon_device *rdev, u64 *target_seq, bool intr, long timeout) argument
566 radeon_fence_wait(struct radeon_fence *fence, bool intr) argument
589 radeon_fence_wait_any(struct radeon_device *rdev, struct radeon_fence **fences, bool intr) argument
1051 radeon_fence_default_wait(struct dma_fence *f, bool intr, signed long t) argument
[all...]
/linux-master/drivers/thermal/broadcom/
H A Dbrcmstb_thermal.c236 int low, high, intr; local
240 intr = avs_tmon_get_intr_temp(priv);
242 dev_dbg(priv->dev, "low/intr/high: %d/%d/%d\n",
243 low, intr, high);
246 if (intr >= high)
249 if (intr <= low)
256 thermal_zone_device_update(priv->thermal, intr);
/linux-master/drivers/net/ethernet/marvell/octeontx2/af/
H A Dmcs.h161 void (*mcs_bbe_intr_handler)(struct mcs *mcs, u64 intr, enum mcs_direction dir);
162 void (*mcs_pab_intr_handler)(struct mcs *mcs, u64 intr, enum mcs_direction dir);
218 void cn10kb_mcs_pab_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir);
219 void cn10kb_mcs_bbe_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir);
230 void cnf10kb_mcs_bbe_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir);
231 void cnf10kb_mcs_pab_intr_handler(struct mcs *mcs, u64 intr, enum mcs_direction dir);
/linux-master/drivers/net/ethernet/pensando/ionic/
H A Dionic_debugfs.c119 struct ionic_intr_info *intr = &qcq->intr; local
184 intr_dentry = debugfs_create_dir("intr", qcq->dentry);
187 &intr->index);
189 &intr->vector);
191 &intr->dim_coal_hw);
199 intr_ctrl_regset->base = &idev->intr_ctrl[intr->index];
/linux-master/drivers/gpu/drm/i915/
H A Di915_vma_resource.h246 bool intr);
252 bool intr,

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