/freebsd-11-stable/sys/sparc64/include/ |
H A D | cpufunc.h | 52 #define CMASK_GEN(bit) ((1 << (bit)) << CMASK_SHIFT) 53 #define MMASK_GEN(bit) ((1 << (bit)) << MMASK_SHIFT)
|
/freebsd-11-stable/sys/arm/samsung/exynos/ |
H A D | exynos5_combiner.c | 117 int bit; member in struct:combiner_entry 323 for (i = 0; i < NGRP && interrupt_table[i].bit != -1; i++) { 341 cirq = &intr_map[grp][entry->bit]; 347 shift = (grp % 4) * 8 + entry->bit;
|
/freebsd-11-stable/contrib/llvm-project/compiler-rt/lib/builtins/ |
H A D | fp_extend_impl.inc | 15 // (for example) the Intel 80-bit format or PowerPC double-double format. 24 // to add support for quad on some 32-bit systems, for example. You also may 33 // 2. Quiet NaNs, if supported, are indicated by the leading bit of the 81 // bit (if needed) and right-aligning the rest of the trailing NaN 90 // renormalize the significand and clear the leading bit, then insert
|
/freebsd-11-stable/contrib/llvm-project/libunwind/src/ |
H A D | AddressSpace.hpp | 257 /// Read a ULEB128 into a 64-bit word. 262 int bit = 0; local 271 if (bit >= 64 || b << bit >> bit != b) { 274 result |= b << bit; 275 bit += 7; 282 /// Read a SLEB128 into a 64-bit word. 287 int bit = 0; local 293 result |= ((byte & 0x7f) << bit); [all...] |
/freebsd-11-stable/contrib/llvm-project/lld/ELF/Arch/ |
H A D | Hexagon.cpp | 78 for (size_t bit = 0; bit != 32; ++bit) { 80 uint32_t maskBit = (mask >> bit) & 1; 82 result |= (valBit << bit); 180 // zero. Non-duplex insns will always have at least one bit set in the
|
/freebsd-11-stable/sys/dev/aic7xxx/ |
H A D | aic79xx_pci.c | 316 * controllers, mask out the IROC/HostRAID bit 389 * address cycles. This bit must be set to enable 390 * high address bit generation even if we are on a 391 * 64bit bus (PCI64BIT set in devconfig). 480 * at least one bit that is guaranteed to 572 /* Address is always in units of 16bit words */ 589 /* Address is always in units of 16bit words */ 619 * in SCB 0xFF. We manually compose the data as 16bit 860 u_int bit; local 865 for (bit 924 u_int bit; local [all...] |
/freebsd-11-stable/sys/arm/nvidia/ |
H A D | tegra_gpio.c | 154 int bit; local 156 bit = GPIO_BIT(pin->gp_pin); 157 tmp = 0x100 << bit; /* mask */ 158 tmp |= (val & 1) << bit; /* value */ 165 int bit; local 168 bit = GPIO_BIT(pin->gp_pin); 170 return (val >> bit) & 1; 346 int bit; local 348 bit = GPIO_BIT(tgi->irq); 349 tmp = 0x100 << bit; /* mas 359 int bit; local [all...] |
/freebsd-11-stable/sys/fs/ext2fs/ |
H A D | ext2_alloc.c | 736 int bit, bit_max, inodes_per_block; local 749 for (bit = 0; bit < bit_max; bit++) 750 setbit(bp->b_data, bit); 802 int bit, loc, end, error, start; local 871 bit = fls(bbp[loc]); 872 runlen = NBBY - bit; 873 runstart = loc * NBBY + bit; 882 bit 941 int bit, error, got, i, loc, run; local [all...] |
/freebsd-11-stable/contrib/sendmail/libmilter/ |
H A D | engine.c | 142 ** each state (ST_*) corresponds to bit in an int value (1 << state) 149 #define MI_MASK(x) (0x0001 << (x)) /* generate a bit "mask" for a state */ 432 ** if the IGNO bit is set: "ignore" the error, 545 ** GET_NR_BIT -- get "no reply" bit matching state 551 ** 0: no matching bit 552 ** >0: the matching "no reply" bit 561 unsigned long bit; local 566 bit = SMFIP_NR_CONN; 569 bit = SMFIP_NR_HELO; 572 bit 620 unsigned long bit; local [all...] |
/freebsd-11-stable/lib/libvgl/ |
H A D | bitmap.c | 92 outb(0x3ce, 0x08); outb(0x3cf, 0xff); /* bit mask */ 180 int i, bit, pos, count, planepos, start_offset, end_offset, offset; local 228 bit = 7 - start_offset; 230 for (; bit >= 0 && pos < width; bit--, pos++) { 231 line[pos] = (VGLPlane[0][planepos] & (1<<bit) ? 1 : 0) | 232 ((VGLPlane[1][planepos] & (1<<bit) ? 1 : 0) << 1) | 233 ((VGLPlane[2][planepos] & (1<<bit) ? 1 : 0) << 2) | 234 ((VGLPlane[3][planepos] & (1<<bit) ? 1 : 0) << 3); 237 bit [all...] |
/freebsd-11-stable/sys/amd64/vmm/io/ |
H A D | vatpic.c | 130 int bit, pin; local 134 bit = (1 << pin); 136 if (atpic->service & bit) { 138 * An IS bit that is masked by an IMR bit will not be 141 if (atpic->smm && (atpic->mask & bit) != 0) 155 int bit, pin, tmp; local 167 * In 'Special Mask Mode', when a mask bit is set in OCW1 it inhibits 176 bit = 1 << pin; 182 if ((serviced & bit) ! [all...] |
/freebsd-11-stable/usr.sbin/makefs/ffs/ |
H A D | ffs_alloc.c | 544 * map for an appropriate bit pattern 606 int i, start, end, forw, back, map, bit; local 629 bit = 1 << (start % NBBY); 631 if ((map & bit) == 0) 634 bit <<= 1; 637 bit = 1; 650 bit = 1 << (start % NBBY); 652 if ((map & bit) == 0) 655 bit >>= 1; 658 bit [all...] |
/freebsd-11-stable/sys/dev/ow/ |
H A D | ow.c | 122 int bit; local 125 OWLL_READ_DATA(lldev, t, &bit); 126 byte |= bit << i; 134 int present, i, bit, tries; local 178 OWLL_READ_DATA(lldev, t, &bit); 179 cmd->xpt_read[i / 8] |= bit << (i % 8); 343 * See AN397 section 5.II.C.3 for the algorithm (though a bit 345 * send ROM ID bits one at a time (first the bit, then the 346 * complement) the master (us) sends back a bit. If the 347 * device's bit does [all...] |
/freebsd-11-stable/sys/dev/terasic/de4led/ |
H A D | terasic_de4led.c | 58 led_update(struct terasic_de4led_softc *sc, int bit, int onoff) argument 62 TERASIC_DE4LED_SETLED(sc, bit, onoff);
|
/freebsd-11-stable/sbin/ifconfig/ |
H A D | af_inet6.c | 366 int byte, bit, plen = 0; local 373 for (bit = 7; bit != 0; bit--, plen++) 374 if (!(name[byte] & (1 << bit))) 376 for (; bit != 0; bit--) 377 if (name[byte] & (1 << bit))
|
/freebsd-11-stable/sys/dev/sfxge/common/ |
H A D | siena_nic.c | 592 unsigned int bit; local 602 /* bit sweep on and off */ 605 for (bit = 0; bit < 128; bit++) { 606 /* Is this bit in the mask? */ 607 if (~(rsp->mask.eo_u32[bit >> 5]) & (1 << bit)) 610 /* Test this bit can be set in isolation */ 613 EFX_SET_OWORD_BIT(reg, bit); [all...] |
/freebsd-11-stable/contrib/bmake/mk/ |
H A D | meta.subdir.mk | 34 # this is the cunning bit 35 # actually it is probably a bit risky
|
/freebsd-11-stable/sys/dev/bxe/ |
H A D | ecore_sp.h | 70 typedef bus_addr_t ecore_dma_addr_t; /* expected to be 64 bit wide */ 116 #define ECORE_SET_BIT_NA(bit, var) bit_set(var, bit) /* non-atomic */ 117 #define ECORE_CLEAR_BIT_NA(bit, var) bit_clear(var, bit) /* non-atomic */ 118 #define ECORE_TEST_BIT(bit, var) bxe_test_bit(bit, var) 119 #define ECORE_SET_BIT(bit, var) bxe_set_bit(bit, var) 120 #define ECORE_CLEAR_BIT(bit, va [all...] |
/freebsd-11-stable/share/mk/ |
H A D | meta.subdir.mk | 35 # this is the cunning bit 36 # actually it is probably a bit risky
|
/freebsd-11-stable/lib/libiconv_modules/UES/ |
H A D | citrus_ues.c | 124 to_str(char *s, wchar_t wc, int bit) argument 130 switch (bit) { 141 *p++ = xdig[(wc >> (bit -= 4)) & 0xF]; 142 } while (bit > 0);
|
/freebsd-11-stable/contrib/tzcode/zic/ |
H A D | private.h | 120 Please use a compiler that supports a 64-bit integer type (or wider); 193 ** Subtract one for the sign bit if the type is signed;
|
/freebsd-11-stable/sys/dev/cxgb/ |
H A D | cxgb_osdep.h | 169 #define test_and_clear_bit(bit, p) atomic_cmpset_int((p), ((*(p)) | (1<<bit)), ((*(p)) & ~(1<<bit)))
|
/freebsd-11-stable/crypto/openssl/crypto/bn/asm/ |
H A D | sparcv9-gf2m.pl | 84 srax $a4,63,@i[1] ! broadcast 61st bit 87 srax $a2,63,@i[0] ! broadcast 62nd bit 89 srax $a1,63,$lo ! broadcast 63rd bit
|
H A D | sparcv9a-mont.pl | 14 # FPU is fully pipelined and can effectively emit 48 bit partial 71 # In order to provide for 32-/64-bit ABI duality, I keep integers wider 72 # than 32 bit in %g1-%g4 and %o0-%o5. %l0-%l7 and %i0-%i5 are used 83 $ap_l="%l1"; # a[num],n[num] are smashed to 32-bit words and saved 89 $mask="%l7"; # 16-bit mask, 0xffff 91 $n0="%g4"; # reassigned(!) to "64-bit" register 92 $carry="%i4"; # %i4 reused(!) for a carry bit 121 $ASI_FL16_P=0xD2; # magic ASI value to engage 16-bit FP load 163 wr %g0,$ASI_FL16_P,%asi ! setup %asi for 16-bit FP loads 194 ld [%o3+0],$alo_ ! load a[j] as pair of 32-bit word [all...] |
/freebsd-11-stable/stand/ |
H A D | defs.mk | 97 # All PowerPC builds are 32 bit. We have no 64-bit loaders on powerpc 103 # For amd64, there's a bit of mixed bag. Some of the tree (i386, lib*32) is 104 # build 32-bit and some 64-bit (lib*, efi). Centralize all the 32-bit magic here
|