Searched refs:r3 (Results 126 - 150 of 276) sorted by path

1234567891011>>

/freebsd-11-stable/secure/lib/libcrypto/arm/
H A Dsha512-armv4.S71 sub r3,pc,#8 @ sha512_block_data_order
75 ldr r12,[r3,r12] @ OPENSSL_armcap_P
80 sub r14,r3,#672 @ K512
96 ldr r3,[r0,#8+LO]
102 str r3,[sp,#8+0]
108 ldr r3,[r0,#40+LO]
110 str r3,[sp,#40+0]
115 ldrb r3,[r1,#7]
121 orr r3,r3,r
[all...]
/freebsd-11-stable/stand/powerpc/kboot/
H A Dhost_syscall.S14 li %r3, 0
41 li %r3, 0
H A Dkerneltramp.S6 * entry point and arguments r3-r7 are copied into the trampoline text (which
21 .space 24 /* branch address, r3-r7 */
39 li %r3,0x40
40 1: lwz %r1,0(%r3)
61 lwz %r3,4(%r8)
76 lwbrx %r3, %r8, %r10
/freebsd-11-stable/sys/arm/arm/
H A Dbcopy_page.S73 ldmia r0!, {r3-r8,ip,lr} ; \
74 stmia r1!, {r3-r8,ip,lr}
143 mov r3, #0
153 stmia r0!, {r3-r8,ip,lr}
154 stmia r0!, {r3-r8,ip,lr}
155 stmia r0!, {r3-r8,ip,lr}
156 stmia r0!, {r3-r8,ip,lr}
162 stmia r0!, {r3-r8,ip,lr}
163 stmia r0!, {r3-r8,ip,lr}
164 stmia r0!, {r3
[all...]
H A Dbcopyinout.S96 adds r3, r0, r2
101 cmp r3, r12
105 ldr r3, .L_arm_memcpy
106 ldr r3, [r3]
107 cmp r3, #0
109 ldr r3, .L_min_memcpy_size
110 ldr r3, [r3]
111 cmp r2, r3
[all...]
H A Dbcopyinout_xscale.S68 adds r3, r0, r2
73 cmp r3, r12
77 ldr r3, .L_arm_memcpy
78 ldr r3, [r3]
79 cmp r3, #0
81 ldr r3, .L_min_memcpy_size
82 ldr r3, [r3]
83 cmp r2, r3
[all...]
H A Dblockio.S74 ldrb r3, [r0]
75 strb r3, [r1], #1
76 ldrbge r3, [r0]
77 strbge r3, [r1], #1
78 ldrbgt r3, [r0]
79 strbgt r3, [r1], #1
84 ldrb r3, [r0]
86 orr r3, r3, r12, lsl #8
88 orr r3, r
[all...]
H A Dbus_space_asm_generic.S69 strb r3, [r1, r2]
74 strh r3, [r1, r2]
79 str r3, [r1, r2]
89 mov r1, r3
94 1: ldrb r3, [r0]
95 strb r3, [r1], #1
104 mov r1, r3
109 1: ldrh r3, [r0]
110 strh r3, [r1], #2
119 mov r1, r3
[all...]
H A Dcopystr.S67 * r3 - lencopied
89 2: teq r3, #0x00000000
90 strne r5, [r3]
103 * r3 - lencopied
145 2: teq r3, #0x00000000
146 strne r6, [r3]
156 * r3 - lencopied
198 2: teq r3, #0x00000000
199 strne r6, [r3]
H A Dcpu_asm-v6.S42 * only r0-r3,r12 (ip) are modified and no stack space is used. These functions
68 ubfx r3, r0, #3, #10 /* get num ways - 1 from CCSIDR */
69 clz r1, r3 /* number of bits to MSB of way */
70 lsl r3, r3, r1 /* shift into position */
77 add r3, r3, r2 /* merge numsets - 1 with numways - 1 */
83 /* r3 = ways/sets, r2 = way decr, r1 = set decr, r0 and ip are free */
84 2: mcr CP15_DCISW(r3) /* invalidate line */
85 movs r0, r3 /* ge
[all...]
H A Dcpufunc_asm.S117 mrc CP15_SCTLR(r3) /* Read the control register */
118 bic r2, r3, r0 /* Clear bits */
122 teq r2, r3 /* Only write if there is a change */
124 mov r0, r3 /* Return old value */
H A Dcpufunc_asm_arm11x6.S142 mov r3, #0
143 mcr p15, 0, r3, c13, c0, 0 /* write FCSE (uTLB invalidate) */
144 mcr p15, 0, r3, c7, c5, 4 /* flush prefetch buffer */
145 add r3, pc, #0x24
146 mcr p15, 0, r3, c7, c13, 1 /* prefetch I-cache line */
169 mov r3, #0
170 mcr p15, 0, r3, c13, c0, 0 /* write FCSE (uTLB invalidate) */
171 mcr p15, 0, r3, c7, c5, 4 /* flush prefetch buffer */
172 add r3, pc, #0x24
173 mcr p15, 0, r3, c
[all...]
H A Dcpufunc_asm_arm9.S70 i_inc .req r3
77 sub r3, ip, #1
78 and r2, r0, r3
80 bic r0, r0, r3
120 sub r3, ip, #1
121 and r2, r0, r3
123 bic r0, r0, r3
137 sub r3, ip, #1
138 and r2, r0, r3
140 bic r0, r0, r3
[all...]
H A Dcpufunc_asm_armv5_ec.S82 sub r3, ip, #1
83 and r2, r0, r3
85 bic r0, r0, r3
121 sub r3, ip, #1
122 and r2, r0, r3
124 bic r0, r0, r3
140 sub r3, ip, #1
141 and r2, r0, r3
143 bic r0, r0, r3
163 sub r3, i
[all...]
H A Dcpufunc_asm_armv7.S124 ldr r3, [r0]
125 cmp r3, #0
163 cmp r3, r8
188 sub r3, ip, #1
189 and r2, r0, r3
191 bic r0, r0, r3
204 sub r3, ip, #1
205 and r2, r0, r3
207 bic r0, r0, r3
224 sub r3, i
[all...]
H A Dcpufunc_asm_sheeva.S46 orr r3, r2, #PSR_I | PSR_F
47 msr cpsr_c, r3
88 add r3, r0, ip
89 sub r2, r3, #1
91 orr r3, lr, #PSR_I | PSR_F
92 msr cpsr_c, r3
131 add r3, r0, ip
132 sub r2, r3, #1
134 orr r3, lr, #PSR_I | PSR_F
135 msr cpsr_c, r3
[all...]
H A Dcpufunc_asm_xscale.S114 mrc CP15_SCTLR(r3) /* Read the control register */
115 bic r2, r3, r0 /* Clear bits */
118 teq r2, r3 /* Only write if there was a change */
121 mov r0, r3 /* Return old value */
134 mrs r3, cpsr
135 orr r1, r3, #(PSR_I | PSR_F)
138 stmfd sp!, {r0-r3, lr}
145 ldmfd sp!, {r0-r3, lr}
159 msr cpsr_fsxc, r3
259 mrs r3, cps
[all...]
H A Dcpufunc_asm_xscale_c3.S148 orr r3, r1, r2, asl #5
149 mcr p15, 0, r3, c7, c14, 2 /* clean and invalidate */
261 orr r3, r1, r2, asl #5
262 mcr p15, 1, r3, c7, c15, 2
341 mrs r3, cpsr
342 orr r1, r3, #(PSR_I | PSR_F)
345 stmfd sp!, {r0-r3, lr}
352 ldmfd sp!, {r0-r3, lr}
366 msr cpsr_fsxc, r3
H A Delf_trampoline.c52 void __startC(unsigned r0, unsigned r1, unsigned r2, unsigned r3);
181 _startC(unsigned r0, unsigned r1, unsigned r2, unsigned r3) argument
190 s_boot_params.abp_r3 = r3;
228 "mov r3, %5\n"
233 : "r0", "r1", "r2", "r3");
H A Dexception.S151 stmdb sp, {r0-r3}; /* Save 4 registers */ \
154 mrs r3, spsr; /* Save xxx32 spsr */ \
166 msr spsr_fsxc, r3; /* Restore correct spsr */ \
167 ldmdb r1, {r0-r3}; /* Restore 4 regs from xxx mode */ \
178 ldr r3, [r5]; /* Retrieve global RAS_START */ \
179 cmp r3, #0; /* and reset it if non-zero. */ \
184 strhi r3, [r0, #16]; /* the RAS_START location. */ \
189 stmdb sp, {r0-r3}; /* Save 4 registers */ \
192 mrs r3, spsr; /* Save xxx32 spsr */ \
204 msr spsr_fsxc, r3; /* Restor
[all...]
H A Dfiq_subr.S56 mov r3, r2 ; \
62 msr cpsr_fsxc, r3
H A Dfusu.S84 strexeq r5, r3, [r0]
90 strteq r3, [r0]
119 ldr r3, =(VM_MAXUSER_ADDRESS-3)
120 cmp r0, r3
132 adr r3, .Lfusufault
133 str r3, [r2, #PCB_ONFAULT]
135 ldrt r3, [r0]
136 str r3, [r1]
150 ldr r3, =(VM_MAXUSER_ADDRESS-1)
151 cmp r0, r3
[all...]
H A Din_cksum_arm.S214 ldmia r0!, {r3, r4, r5, r6}
215 adds r2, r2, r3
218 ldmia r0!, {r3, r4, r5, r7}
220 adcs r2, r2, r3
223 ldmia r0!, {r3, r4, r5, r6}
225 adcs r2, r2, r3
228 ldmia r0!, {r3, r4, r5, r7}
230 adcs r2, r2, r3
261 ldmia r0!, {r3, r4, r5, r6}
262 adds r2, r2, r3
[all...]
H A Dinckern.S34 mov sp, r3
35 mov r3, #1
H A Dlocore-v4.S92 mov fp, r3 /* Future expansion */
186 mov r3, #4096
195 mov r3, #64
204 ldr r3, =((KERNVIRTADDR - KERNBASE) / L1_S_SIZE)
212 mov r3, #1
241 mov r3, #0
243 str r3, [r1], #0x0004 /* get zero init data */
256 str fp, [r0, #16] /* store r3 from boot loader */
314 * r3 - The number of 1MiB sections
331 mov r4, r3
[all...]

Completed in 246 milliseconds

1234567891011>>