Searched refs:map (Results 126 - 150 of 2546) sorted by path

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/linux-master/arch/alpha/mm/
H A Dinit.c55 /* The last PGD entry is the VPTB self-map. */
164 - crb->map[0].va);
167 - crb->map[0].va);
202 nr_pages += crb->map[i].count;
214 unsigned long pfn = crb->map[i].pa >> PAGE_SHIFT;
215 crb->map[i].va = vaddr;
216 for (j = 0; j < crb->map[i].count; ++j) {
239 * paging_init() sets up the memory map.
/linux-master/arch/arc/kernel/
H A Dintc-arcv2.c156 .map = arcv2_irq_map,
H A Dintc-compact.c104 .map = arc_intc_domain_map,
H A Dmcip.c367 .map = idu_irq_map,
/linux-master/arch/arc/mm/
H A Ddma.c6 #include <linux/dma-map-ops.h>
39 * | map == for_device | unmap == for_cpu
91 * Plug in direct dma map ops.
/linux-master/arch/arc/plat-axs10x/
H A Daxs10x.c121 * Each AXI master has a 4GB memory map specified as 16 apertures of 256MB, each
122 * of which maps to a corresponding 256MB aperture in Target slave memory map.
131 * MB AXI Tunnel Master, which also has a mem map setup
133 * In the reverse direction, MB AXI Masters (e.g. GMAC) mem map is setup
134 * to map to MB AXI Tunnel slave which connects to CPU Card AXI Tunnel Master
206 * Same mem map for all perip controllers as well as MB AXI Tunnel Master
228 axs101_set_memmap(void __iomem *base, const struct aperture map[16]) argument
235 slave_select |= map[i].slave_sel << (i << 2);
236 slave_offset |= map[i].slave_off << (i << 2);
244 slave_select |= map[
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/linux-master/arch/arm/boot/
H A Dinstall.sh17 # $3 - kernel map file
35 # Install system map file
36 if [ -f $4/System.map-$1 ]; then
37 mv $4/System.map-$1 $4/System.map-$1.old
39 cp $3 $4/System.map-$1
/linux-master/arch/arm/common/
H A Dsa1111.c25 #include <linux/dma-map-ops.h>
375 .map = sa1111_irqdomain_map,
/linux-master/arch/arm/include/asm/
H A Defi.h14 #include <asm/mach/map.h>
/linux-master/arch/arm/include/asm/mach/
H A Dmap.h3 * arch/arm/include/asm/map.h
61 #define iotable_init(map,num) do { } while (0)
/linux-master/arch/arm/kernel/
H A Dbios32.c17 #include <asm/mach/map.h>
H A Defi.c11 #include <asm/mach/map.h>
97 pr_warn("Unable to map CPU entry state table.\n");
H A Dhead-nommu.S167 biceq r0, r0, #CR_BR @ Disable the 'default mem-map'
274 sub r6, r6, r5 @ Minimum size of region to map
280 /* Determine whether the D/I-side memory map is unified. We set the
296 beq 1f @ Memory-map not unified
309 beq 2f @ Memory-map not unified
321 sub r6, r6, r0 @ Minimum size of region to map
328 beq 3f @ Memory-map not unified
472 /* Determine whether the D/I-side memory map is unified. We set the
H A Dtcm.c17 #include <asm/mach/map.h>
/linux-master/arch/arm/mach-at91/
H A Dsama5.c14 #include <asm/mach/map.h>
/linux-master/arch/arm/mach-davinci/
H A Dcommon.c17 #include <asm/mach/map.h>
35 pr_err("Unable to map JTAG ID register\n");
H A Dda830.c18 #include <asm/mach/map.h>
506 WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module");
H A Dda850.c22 #include <asm/mach/map.h>
364 if (WARN(!da8xx_syscfg0_base, "Unable to map syscfg0 module"))
368 WARN(!da8xx_syscfg1_base, "Unable to map syscfg1 module");
H A Ddevices-da8xx.c13 #include <linux/dma-map-ops.h>
67 pr_warn("%s: Unable to map DDR2 controller", __func__);
/linux-master/arch/arm/mach-dove/
H A Dcommon.c18 #include <asm/mach/map.h>
H A Dpcie.c17 #include <plat/addr-map.h>
/linux-master/arch/arm/mach-ep93xx/
H A Dcore.c48 #include <asm/mach/map.h>
H A Dts72xx.c27 #include <asm/mach/map.h>
34 * IO map
H A Dvision_ep9307.c36 #include <asm/mach/map.h>
/linux-master/arch/arm/mach-exynos/
H A Dexynos.c20 #include <asm/mach/map.h>

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