Searched refs:id (Results 126 - 150 of 10515) sorted by path

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/linux-master/drivers/eisa/
H A Dvirtual_root.c30 .id = 0,
/linux-master/drivers/extcon/
H A Ddevres.c34 unsigned int id; member in struct:extcon_dev_notifier_devres
42 extcon_unregister_notifier(this->edev, this->id, this->nb);
159 * @id: the unique id among the extcon enumeration
173 unsigned int id, struct notifier_block *nb)
183 ret = extcon_register_notifier(edev, id, nb);
190 ptr->id = id;
203 * @id: the unique id amon
172 devm_extcon_register_notifier(struct device *dev, struct extcon_dev *edev, unsigned int id, struct notifier_block *nb) argument
206 devm_extcon_unregister_notifier(struct device *dev, struct extcon_dev *edev, unsigned int id, struct notifier_block *nb) argument
[all...]
/linux-master/drivers/firewire/
H A Dnosy.h189 #define LINK_ID_BUS(id) (id<<22)
190 #define LINK_ID_NODE(id) (id<<16)
/linux-master/drivers/gpu/drm/amd/amdgpu/
H A Dclearstate_defs.h41 const enum section_id id; member in struct:cs_section_def
/linux-master/drivers/gpu/drm/amd/display/dc/bios/
H A Dcommand_table_helper_struct.h35 bool (*controller_id_to_atom)(enum controller_id id, uint8_t *atom_id);
46 bool (*clock_source_id_to_atom)(enum clock_source_id id,
49 enum clock_source_id id,
52 uint8_t (*encoder_id_to_atom)(enum encoder_id id);
54 enum clock_source_id id);
56 uint8_t (*hpd_sel_to_atom)(enum hpd_source_id id);
61 bool (*dc_clock_type_to_atom)(enum bp_dce_clock_type id,
63 uint8_t (*transmitter_color_depth_to_atom)(enum transmitter_color_depth id);
/linux-master/drivers/gpu/drm/amd/display/dc/bios/dce80/
H A Dcommand_table_helper_dce80.c61 static bool engine_bp_to_atom(enum engine_id id, uint32_t *atom_engine_id) argument
66 switch (id) {
107 enum clock_source_id id,
113 switch (id) {
153 enum clock_source_id id)
157 switch (id) {
208 static uint8_t hpd_sel_to_atom(enum hpd_source_id id) argument
212 switch (id) {
239 static uint8_t dig_encoder_sel_to_atom(enum engine_id id) argument
243 switch (id) {
106 clock_source_id_to_atom( enum clock_source_id id, uint32_t *atom_pll_id) argument
152 clock_source_id_to_atom_phy_clk_src_id( enum clock_source_id id) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dce110/
H A Dhw_translate_dce110.c42 enum gpio_id *id,
48 *id = GPIO_ID_GENERIC;
78 *id = GPIO_ID_HPD;
105 *id = GPIO_ID_SYNC;
120 *id = GPIO_ID_GSL;
182 enum gpio_id id,
188 switch (id) {
39 offset_to_id( uint32_t offset, uint32_t mask, enum gpio_id *id, uint32_t *en) argument
181 id_to_offset( enum gpio_id id, uint32_t en, struct gpio_pin_info *info) argument
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dce120/
H A Dhw_translate_dce120.c54 #define REGI(reg_name, block, id)\
55 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
56 mm ## block ## id ## _ ## reg_name
64 enum gpio_id *id,
70 *id = GPIO_ID_GENERIC;
100 *id = GPIO_ID_HPD;
127 *id = GPIO_ID_SYNC;
142 *id = GPIO_ID_GSL;
204 enum gpio_id id,
210 switch (id) {
61 offset_to_id( uint32_t offset, uint32_t mask, enum gpio_id *id, uint32_t *en) argument
203 id_to_offset( enum gpio_id id, uint32_t en, struct gpio_pin_info *info) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dce80/
H A Dhw_translate_dce80.c66 enum gpio_id *id,
72 *id = GPIO_ID_GENERIC;
102 *id = GPIO_ID_HPD;
129 *id = GPIO_ID_SYNC;
144 *id = GPIO_ID_GSL;
165 *id = GPIO_ID_GPIO_PAD;
211 enum gpio_id id,
217 switch (id) {
63 offset_to_id( uint32_t offset, uint32_t mask, enum gpio_id *id, uint32_t *en) argument
210 id_to_offset( enum gpio_id id, uint32_t en, struct gpio_pin_info *info) argument
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/dcn10/
H A Dhw_translate_dcn10.c54 #define REGI(reg_name, block, id)\
55 BASE(mm ## block ## id ## _ ## reg_name ## _BASE_IDX) + \
56 mm ## block ## id ## _ ## reg_name
64 enum gpio_id *id,
70 *id = GPIO_ID_GENERIC;
100 *id = GPIO_ID_HPD;
127 *id = GPIO_ID_SYNC;
142 *id = GPIO_ID_GSL;
204 enum gpio_id id,
210 switch (id) {
61 offset_to_id( uint32_t offset, uint32_t mask, enum gpio_id *id, uint32_t *en) argument
203 id_to_offset( enum gpio_id id, uint32_t en, struct gpio_pin_info *info) argument
[all...]
/linux-master/drivers/gpu/drm/amd/display/dc/gpio/
H A Dhw_gpio.c181 enum gpio_id id,
186 pin->base.id = id;
179 dal_hw_gpio_construct( struct hw_gpio *pin, enum gpio_id id, uint32_t en, struct dc_context *ctx) argument
H A Dhw_gpio.h41 enum gpio_id id; member in struct:hw_gpio_pin
114 enum gpio_id id,
H A Dhw_translate.h33 enum gpio_id *id,
36 enum gpio_id id,
/linux-master/drivers/gpu/drm/i915/gvt/
H A Ddebug.h35 pr_err("gvt: vgpu %d: "fmt, vgpu->id, ##args);\
/linux-master/drivers/gpu/drm/i915/
H A Di915_syncmap.h34 int i915_syncmap_set(struct i915_syncmap **root, u64 id, u32 seqno);
35 bool i915_syncmap_is_later(struct i915_syncmap **root, u64 id, u32 seqno);
/linux-master/drivers/gpu/drm/nouveau/include/nvif/
H A Dif0002.h11 __u8 id; member in struct:nvif_perfmon_query_domain_v0
/linux-master/drivers/gpu/drm/nouveau/include/nvkm/subdev/bios/
H A Dbit.h5 u8 id; member in struct:bit_entry
11 int bit_entry(struct nvkm_bios *, u8 id, struct bit_entry *);
/linux-master/drivers/gpu/drm/nouveau/
H A Dnouveau_bios.h42 uint8_t id; member in struct:bit_entry
49 int bit_table(struct drm_device *, u8 id, struct bit_entry *);
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/bios/
H A Dbit.c28 bit_entry(struct nvkm_bios *bios, u8 id, struct bit_entry *bit) argument
34 if (nvbios_rd08(bios, entry + 0) == id) {
35 bit->id = nvbios_rd08(bios, entry + 0);
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/fb/
H A Dgddr3.c28 int id; member in struct:ramxlat
33 ramxlat(const struct ramxlat *xlat, int id) argument
35 while (xlat->id >= 0) {
36 if (xlat->id == id)
H A Dsddr2.c29 int id; member in struct:ramxlat
34 ramxlat(const struct ramxlat *xlat, int id) argument
36 while (xlat->id >= 0) {
37 if (xlat->id == id)
H A Dsddr3.c29 int id; member in struct:ramxlat
34 ramxlat(const struct ramxlat *xlat, int id) argument
36 while (xlat->id >= 0) {
37 if (xlat->id == id)
/linux-master/drivers/gpu/drm/nouveau/nvkm/subdev/i2c/
H A Danx9805.c103 anx9805_bus_new(struct nvkm_i2c_pad *base, int id, u8 drive, argument
115 ret = nvkm_i2c_bus_ctor(&anx9805_bus_func, &pad->base, id, &bus->base);
232 anx9805_aux_new(struct nvkm_i2c_pad *base, int id, u8 drive, argument
244 ret = nvkm_i2c_aux_ctor(&anx9805_aux_func, &pad->base, id, &aux->base);
265 anx9805_pad_new(struct nvkm_i2c_bus *bus, int id, u8 addr, argument
274 nvkm_i2c_pad_ctor(&anx9805_pad_func, bus->pad->i2c, id, &pad->base);
H A Dbus.c209 struct nvkm_i2c_pad *pad, int id,
223 bus->id = id;
229 dev_name(device->dev), id);
258 struct nvkm_i2c_pad *pad, int id,
263 return nvkm_i2c_bus_ctor(func, pad, id, *pbus);
208 nvkm_i2c_bus_ctor(const struct nvkm_i2c_bus_func *func, struct nvkm_i2c_pad *pad, int id, struct nvkm_i2c_bus *bus) argument
257 nvkm_i2c_bus_new_(const struct nvkm_i2c_bus_func *func, struct nvkm_i2c_pad *pad, int id, struct nvkm_i2c_bus **pbus) argument
H A Dbus.h16 int id, struct nvkm_i2c_bus *);
18 int id, struct nvkm_i2c_bus **);
34 nvkm_##l(&_bus->pad->i2c->subdev, "bus %04x: "f"\n", _bus->id, ##a); \

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