/linux-master/include/linux/mfd/ |
H A D | mc13xxx.h | 133 #define MC13783_LED_C0_ABREF(x) (((x) & 0x3) << 14) 141 #define MC13783_LED_C2_PERIOD(x) (((x) & 0x3) << 21) 144 #define MC13783_LED_C3_CURRENT_R1(x) (((x) & 0x3) << 0) 145 #define MC13783_LED_C3_CURRENT_G1(x) (((x) & 0x3) << 2) 146 #define MC13783_LED_C3_CURRENT_B1(x) (((x) & 0x3) << 4) 147 #define MC13783_LED_C3_PERIOD(x) (((x) & 0x3) << 21) 150 #define MC13783_LED_C4_CURRENT_R2(x) (((x) & 0x3) << 0) 151 #define MC13783_LED_C4_CURRENT_G2(x) (((x) & 0x3) << 2) 152 #define MC13783_LED_C4_CURRENT_B2(x) (((x) & 0x3) << 4) 153 #define MC13783_LED_C4_PERIOD(x) (((x) & 0x3) << 2 [all...] |
/linux-master/sound/soc/codecs/ |
H A D | max98371.h | 27 #define MAX98371_CHANNEL_MASK 0x3 33 #define M98371_DAI_CHANNEL_I2S 0x3 42 #define MAX98371_FMT_MASK ((0x3)<<(MAX98371_CHANSZ_WIDTH)) 50 #define MAX98371_DHT_STEP 0x3
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H A D | inno_rk3036.h | 42 #define INNO_R02_DACM_MSK (0x3 << 3) 43 #define INNO_R02_DACM_PCM (0x3 << 3) /*DAC Mode*/ 47 #define INNO_R02_VWL_MSK (0x3 << 5) 48 #define INNO_R02_VWL_32BIT (0x3 << 5) /*1/2Frame Valid Word Len*/ 62 #define INNO_R03_FWL_MSK (0x3 << 2) 63 #define INNO_R03_FWL_32BIT (0x3 << 2) /*1/2Frame Word Length*/ 94 #define INNO_R09_HP_ANTIPOP_MSK 0x3
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/linux-master/scripts/dtc/include-prefixes/dt-bindings/pmu/ |
H A D | exynos_ppmu.h | 15 #define PPMU_RO_REQUEST_CNT 0x3
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/linux-master/include/dt-bindings/pmu/ |
H A D | exynos_ppmu.h | 15 #define PPMU_RO_REQUEST_CNT 0x3
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/linux-master/drivers/net/ethernet/stmicro/stmmac/ |
H A D | dwxlgmac2.h | 16 #define XLGMAC_CONFIG_SS_100G (0x3 << XLGMAC_CONFIG_SS_SHIFT)
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/linux-master/include/linux/platform_data/ |
H A D | mtd-davinci-aemif.h | 19 #define ACR_ASIZE_MASK 0x3
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/linux-master/drivers/scsi/qla4xxx/ |
H A D | ql4_bsg.h | 21 #define QL_DIAG_CMD_TEST_DDR_RW 0x3
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/linux-master/arch/arm/mach-s3c/ |
H A D | regs-syscon-power-s3c64xx.h | 28 #define S3C64XX_PWRCFG_CFG_WFI_MASK (0x3 << 5) 33 #define S3C64XX_PWRCFG_CFG_WFI_SLEEP (0x3 << 5) 35 #define S3C64XX_PWRCFG_CFG_BATFLT_MASK (0x3 << 3) 39 #define S3C64XX_PWRCFG_CFG_BATFLT_SLEEP (0x3 << 3)
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/linux-master/drivers/media/platform/qcom/camss/ |
H A D | camss-csid-gen1.h | 15 #define DECODE_FORMAT_UNCOMPRESSED_12_BIT 0x3
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/linux-master/include/soc/at91/ |
H A D | sama7-sfrbu.h | 25 #define AT91_SFRBU_PD_VALUE_MSK (0x3)
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/linux-master/scripts/dtc/include-prefixes/dt-bindings/iio/addac/ |
H A D | adi,ad74413r.h | 9 #define CH_FUNC_VOLTAGE_INPUT 0x3
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/linux-master/include/dt-bindings/iio/addac/ |
H A D | adi,ad74413r.h | 9 #define CH_FUNC_VOLTAGE_INPUT 0x3
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/linux-master/include/dt-bindings/mailbox/ |
H A D | tegra186-hsp.h | 16 #define TEGRA_HSP_MBOX_TYPE_AS 0x3
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/linux-master/scripts/dtc/include-prefixes/dt-bindings/mailbox/ |
H A D | tegra186-hsp.h | 16 #define TEGRA_HSP_MBOX_TYPE_AS 0x3
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/linux-master/sound/soc/ti/ |
H A D | omap-mcbsp-priv.h | 78 #define RINTM(value) (((value) & 0x3) << 4) /* bits 4:5 */ 81 #define CLKSTP(value) (((value) & 0x3) << 11) /* bits 11:12 */ 82 #define RJUST(value) (((value) & 0x3) << 13) /* bits 13:14 */ 91 #define XINTM(value) (((value) & 0x3) << 4) /* bits 4:5 */ 123 #define RDATDLY(value) ((value) & 0x3) /* Bits 0:1 */ 125 #define RCOMPAND(value) (((value) & 0x3) << 3) /* Bits 3:4 */ 131 #define XDATDLY(value) ((value) & 0x3) /* Bits 0:1 */ 133 #define XCOMPAND(value) (((value) & 0x3) << 3) /* Bits 3:4 */ 152 #define RPABLK(value) (((value) & 0x3) << 5) /* Bits 5:6 */ 153 #define RPBBLK(value) (((value) & 0x3) << [all...] |
/linux-master/arch/arm/include/asm/hardware/ |
H A D | cache-aurora-l2.h | 23 (0x3 << AURORA_ACR_REPLACEMENT_OFFSET) 36 (0x3 << AURORA_ACR_FORCE_WRITE_POLICY_OFFSET) 69 (0x3 << AURORA_ERR_ATTR_ERR_OFF) 85 #define AURORA_ERR_INJECT_CTL_EN_MASK 0x3
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/linux-master/include/linux/usb/ |
H A D | c67x00.h | 17 #define c67x00_sie_config(config, n) (((config)>>(4*(n)))&0x3)
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/linux-master/drivers/pinctrl/sunxi/ |
H A D | pinctrl-sun50i-a100.c | 21 SUNXI_FUNCTION(0x3, "spi2"), /* CS */ 28 SUNXI_FUNCTION(0x3, "spi2"), /* CLK */ 35 SUNXI_FUNCTION(0x3, "spi2"), /* MOSI */ 42 SUNXI_FUNCTION(0x3, "spi2"), /* MISO */ 49 SUNXI_FUNCTION(0x3, "i2s0"), /* MCLK */ 56 SUNXI_FUNCTION(0x3, "i2s0"), /* BCLK */ 62 SUNXI_FUNCTION(0x3, "i2s0"), /* LRCK */ 69 SUNXI_FUNCTION(0x3, "i2s0_dout0"), /* DOUT0 */ 76 SUNXI_FUNCTION(0x3, "i2s0_din0"), /* DIN0 */ 83 SUNXI_FUNCTION(0x3, "i2c [all...] |
/linux-master/drivers/gpu/drm/xe/instructions/ |
H A D | xe_instr_defs.h | 19 #define XE_INSTR_GFXPIPE REG_FIELD_PREP(XE_INSTR_CMD_TYPE, 0x3)
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/linux-master/drivers/net/wireless/intel/iwlwifi/ |
H A D | iwl-drv.h | 15 #define NVM_RF_CFG_DASH_MSK(x) (x & 0x3) /* bits 0-1 */ 16 #define NVM_RF_CFG_STEP_MSK(x) ((x >> 2) & 0x3) /* bits 2-3 */ 17 #define NVM_RF_CFG_TYPE_MSK(x) ((x >> 4) & 0x3) /* bits 4-5 */ 18 #define NVM_RF_CFG_PNUM_MSK(x) ((x >> 6) & 0x3) /* bits 6-7 */
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/linux-master/drivers/net/wireless/intel/iwlwifi/fw/api/ |
H A D | phy-ctxt.h | 19 #define IWL_PHY_CHANNEL_MODE160 0x3 39 #define IWL_PHY_CTRL_POS_OFFS_MSK 0x3 87 (0x3 << PHY_RX_CHAIN_CNT_POS) 90 (0x3 << PHY_RX_CHAIN_MIMO_CNT_POS)
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/linux-master/drivers/net/wireless/realtek/rtlwifi/rtl8192cu/ |
H A D | def.h | 20 #define CHIP_BONDING_IDENTIFIER(_value) (((_value) >> 22) & 0x3)
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/linux-master/drivers/net/ipa/ |
H A D | ipa_version.h | 55 GSI_EE_TZ = 0x3,
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/linux-master/drivers/accel/habanalabs/include/goya/asic_reg/ |
H A D | cpu_ca53_cfg_masks.h | 24 #define CPU_CA53_CFG_ARM_CFG_AA64NAA32_MASK 0x3 42 #define CPU_CA53_CFG_ARM_RST_CONTROL_NCPUPORESET_MASK 0x3 62 #define CPU_CA53_CFG_ARM_DISABLE_CP15S_MASK 0x3 76 #define CPU_CA53_CFG_ARM_GIC_IRQ_CFG_NREI_MASK 0x3 116 #define CPU_CA53_CFG_ARM_DBG_MODES_EDBGRQ_MASK 0x3 144 #define CPU_CA53_CFG_ARM_PWR_STAT_1_CPUQACTIVE_MASK 0x3 164 #define CPU_CA53_CFG_ARM_DBG_STATUS_DBGACK_MASK 0x3
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