Searched refs:set (Results 101 - 125 of 1536) sorted by path

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/freebsd-11-stable/contrib/gcc/
H A Ddfp.c58 /* Initialize R (a real with the decimal flag set) from DN. Can
95 decContext set; local
96 decContextDefault (&set, DEC_INIT_DECIMAL128);
97 set.traps = 0;
99 decNumberFromString (&dn, (char *) s, &set);
104 decimal_from_decnumber (r, &dn, &set);
112 decContext set; local
113 decContextDefault (&set, DEC_INIT_DECIMAL128);
114 set.traps = 0;
122 decNumberFromString (dn, (char *)"Infinity", &set);
151 decContext set; local
173 decContext set; local
195 decContext set; local
223 decContext set; local
250 decContext set; local
283 decContext set; local
344 decContext set; local
386 decContext set; local
467 decContext set; local
493 decContext set; local
515 decContext set; local
538 decContext set; local
554 decContext set; local
581 decContext set; local
[all...]
H A Demit-rtl.c49 #include "hard-reg-set.h"
122 should be used if it is being set, and frame_pointer_rtx otherwise. After
364 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
533 /* If the per-function register table has been set up, try to re-use
542 set ORIGINAL_REGNO. */
1432 corresponding to REF, set the memory attributes. OBJECTP is nonzero
1458 /* If we have already set DECL_RTL = ref, get_alias_set will get the
1460 info. Callers should not set DECL_RTL until after the call to
1464 /* Get the alias set from the expression or type (perhaps using a
1477 /* We can set th
1709 set_mem_alias_set(rtx mem, HOST_WIDE_INT set) argument
[all...]
H A Dexplow.c36 #include "hard-reg-set.h"
132 /* If adding to something entirely constant, set a flag
656 rtx temp, insn, set;
681 if INSN set something else (such as a SUBREG of TEMP). */
683 && (set = single_set (insn)) != 0
684 && SET_DEST (set) == temp
685 && ! rtx_equal_p (x, SET_SRC (set)))
1363 /* Next see if the front end has set up a function for us to call to
652 rtx temp, insn, set; local
H A Dexpmed.c1236 If that's wrong, the solution is to test for it and set TARGET to 0
1302 /* Indicate for flow that the entire target reg is being set. */
2024 lowpart. Otherwise, shift to get the sign bits set properly. */
3068 we've set the inner register and must properly indicate
3836 rtx insn, set;
3865 Last comes code that finishes the operation. If QUOTIENT is set and
3866 REM_FLAG is set, the remainder is computed as OP0 - QUOTIENT * OP1. If
3867 QUOTIENT is not set, it is computed using trunc rounding.
3970 for a different constant. Then set the constant of the last
4057 /* Most significant bit of divisor is set; emi
3823 rtx insn, set; local
[all...]
H A Dexpr.c33 #include "hard-reg-set.h"
242 /* This is run once per compilation to set up which modes can be used
520 so that we always generate the same set of insns for
1575 original set of registers is replaced by a new set of pseudo registers.
1576 The new set has the same modes as the original set. */
2057 set of registers starting with SRCREG into TGTBLK. If TGTBLK
2091 set PADDING_CORRECTION to the number of bits to skip.
3284 rtx last_insn, set;
3274 rtx last_insn, set; local
[all...]
H A Dfinal.c37 Instructions to set the condition codes are omitted when it can be
63 #include "hard-reg-set.h"
162 set and examined by output routines
176 In life_analysis, or in stupid_life_analysis, this is set
184 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
186 eliminable regs like the frame pointer are set if an asm sets them. */
662 /* BRANCH has no proper alignment chain set, so use SEQ.
831 /* Initialize set up uid_shuid to be strictly
1440 /* First output the function prologue: code to set up the stack frame. */
1697 rtx set;
1688 rtx set; local
[all...]
H A Dflow.c78 REG_UNUSED notes are added for each register that is set by the insn
79 but is unused subsequently (if every register set by the insn is unused
87 which registers are set by each insn and which die there.
130 #include "hard-reg-set.h"
228 /* Bit N is set if register N is conditionally or unconditionally live. */
231 /* Bit N is set if register N is set this insn. */
242 /* If non-null, record the set of registers set unconditionally in the
246 /* If non-null, record the set o
926 regset set = (regset) xset; local
944 mark_regs_live_at_end(regset set) argument
2115 rtx insn, set; local
3503 rtx set = single_set (incr); local
3663 rtx set, y, incr, inc_val; local
[all...]
H A Dfunction.c52 #include "hard-reg-set.h"
98 (ignoring the prologue and epilogue). This is set prior to
115 calls.c:emit_library_call_value_1 uses it to set up
778 /* If we know the alias set for the memory that will be used, use
780 alias set for the memory. */
784 /* If a type is specified, set the relevant flags. */
888 is in which alias set will be lost. */
1255 is a virtual register, return the equivalent hard register and set the
1291 in any sense implied by the target. If any change is made, set CHANGED
1368 rtx set, ne
1357 rtx set, new, x, seq; local
2796 rtx sinsn, set; local
4943 handle_epilogue_set(rtx set, struct epi_info *p) argument
[all...]
H A Dgcse.c156 #include "hard-reg-set.h"
194 2) Compute table of places where registers are set.
211 (set (pseudo-reg) (expression)).
397 is set.
409 need to iterate over the number of times a pseudo-reg is set, not over the
411 where a pseudo is set more than once in a block, however it is believed
421 /* The index of the block where it was set. */
460 /* Array of implicit set patterns indexed by basic block index. */
470 Used when performing GCSE to track which registers have been set since
474 /* For each block, a bitmap of registers set i
2648 rtx set = single_set (insn); local
2720 struct expr *set = lookup_set (regno, &set_hash_table); local
2776 rtx set = pc_set (jump); local
2932 struct expr *set; local
3463 struct expr *set = lookup_set (regno, &set_hash_table); local
3578 struct expr *set; local
4216 rtx set, first_set, new_insn; local
4377 rtx set = single_set (insn), set2; local
4429 rtx set; local
4942 rtx set; local
5630 rtx dest, set, tmp; local
6310 rtx insn, mem, note, set, ptr, pair; local
[all...]
H A Dgenattrtab.c43 set all lengths that do not depend on address. Those that do are set to
82 for constant attributes and generate a set of functions for that given
84 the attributes and installs the corresponding set of routines and
779 int set = 0; local
783 set |= 1 << atoi (p);
785 return mk_attr_alt (set);
1125 message_with_line (id->lineno, "bad attribute set");
2006 /* If uses an address, must return original expression. But set the
2421 /* Return EQ_ATTR_ALT expression representing set containin
3295 int set = XINT (exp, 0), bit = 0; local
[all...]
H A Dgenrecog.c38 pointed to by the optional pointer will be set to the number of
40 the caller). If it is set nonzero, the caller should allocate a
192 Calculating the set of rtx codes that can possibly be accepted by a
231 /* Recursively calculate the set of rtx codes accepted by the
276 constrain the set of codes for the top level. */
328 /* MATCH_OPERAND disallows the set of codes that the named predicate
365 /* Process a define_predicate expression: compute the set of predicates
636 and is the complete set pattern. SET_CODE is '=' for normal sets, and
640 validate_pattern (rtx pattern, rtx insn, rtx set, int set_code)
705 else if (set
637 validate_pattern(rtx pattern, rtx insn, rtx set, int set_code) argument
[all...]
H A Dglobal.c28 #include "hard-reg-set.h"
187 /* For any allocno set in ALLOCNO_SET, set ALLOCNO to that allocno,
210 /* For any allocno that conflicts with IN_ALLOCNO, set OUT_ALLOCNO to
252 /* Test, set or clear bit number I in allocnos_live,
288 /* Record all regs that are set in any one insn.
579 allocate it. So avoid the divide-by-zero and set it to a low
810 /* Make regs_set an empty set. */
843 /* Mark any registers set in INSN as live,
846 the registers that are set
874 rtx set = XVECEXP (PATTERN (insn), 0, i); local
915 rtx set; local
[all...]
H A Difcvt.c34 #include "hard-reg-set.h"
155 /* If this instruction is the load or set of a "stack" register,
164 rtx set = single_set (insn);
165 if (set && STACK_REG_P (SET_DEST (set)))
1373 rtx set;
1389 set = single_set (tmp);
1390 SET_DEST (set) = a;
1398 rtx set, last;
1414 set
163 rtx set = single_set (insn); local
1370 rtx set; local
1395 rtx set, last; local
1481 rtx cond, set, insn; local
1765 rtx set, insn = prev_nonnote_insn (earliest); local
2019 rtx cond, set, tmp; local
2417 rtx set, dest, src; local
2552 rtx set, target, dest, t, e; local
2583 rtx set, target, dest; local
3810 rtx note, set; local
[all...]
H A Djump.c24 of the compiler. Now it contains basically a set of utility functions to
45 #include "hard-reg-set.h"
443 rtx set = set_of (arg0, prev);
444 if (set && GET_CODE (set) == SET
445 && rtx_equal_p (SET_DEST (set), arg0))
447 rtx src = SET_SRC (set);
468 if (set)
869 /* Return set of PC, otherwise NULL. */
879 /* The set i
437 rtx set = set_of (arg0, prev); local
967 rtx set; local
1210 rtx set = single_set (insn); local
[all...]
H A Dlocal-alloc.c67 #include "hard-reg-set.h"
110 is a set of consecutive insns. -1 if death has not been recorded. */
170 The former register set is given priority for allocation. This tends to
173 /* Element Q is a set of hard registers that are suggested for quantity Q by
178 /* Element Q is a set of hard registers that are suggested for quantity Q by
222 This is set up as a result of register allocation.
234 /* Each set of hard registers indicates registers live at a particular
409 for the previous block; it is set to the entire array before
412 explicit set by `alloc_qty'. */
465 validate_equiv_mem_from_store (rtx dest, rtx set ATTRIBUTE_UNUSE
821 rtx set; local
1020 rtx set, src, dest; local
1328 rtx link, set; local
2169 rtx set = XVECEXP (PATTERN (this_insn), 0, i); local
[all...]
H A Dloop-invariant.c44 #include "hard-reg-set.h"
461 rtx expr, set; local
473 set = single_set (inv->insn);
474 expr = SET_SRC (set);
477 mode = GET_MODE (SET_DEST (set));
634 rtx set = single_set (insn); local
640 /* If the set is simple, usually by moving it we move the whole store out of
643 inv->cost = rtx_cost (set, SET);
645 inv->cost = rtx_cost (SET_SRC (set), SET);
743 rtx set, des local
953 rtx set = single_set (inv->insn); local
1136 rtx reg, set, dest, seq, op; local
[all...]
H A Dloop-iv.c56 #include "hard-reg-set.h"
276 is set to NULL and true is returned. */
602 rtx set, rhs, op0 = NULL_RTX, op1 = NULL_RTX; local
609 set = single_set (insn);
610 if (!set)
617 rhs = SET_SRC (set);
645 (set x:SI (plus:SI (subreg:SI y:DI) 1)).
649 (set x':DI (plus:DI y:DI 1))
650 (set x:SI (subreg:SI (x':DI)). */
1025 rtx set, rh local
1389 rtx set = single_set (insn); local
[all...]
H A Dloop-unroll.c26 #include "hard-reg-set.h"
1553 rtx set, dest, src, op1; local
1557 set = single_set (insn);
1558 if (!set)
1561 dest = SET_DEST (set);
1562 src = SET_SRC (set);
1646 rtx set, dest; local
1653 set = single_set (insn);
1654 if (!set)
1657 dest = SET_DEST (set);
1868 rtx src, dest, set; local
1948 rtx new_reg, set; local
[all...]
H A Dmodulo-sched.c31 #include "hard-reg-set.h"
182 otherwise we set it to 1. */
247 regset set ATTRIBUTE_UNUSED)
304 /* Check if COUNT_REG is set to a constant in the PRE_HEADER block, so
306 return the rtx that sets COUNT_REG to a constant, and set COUNT to
402 requires more cycles than this bound. Currently set to the sum of the
1042 fprintf (dump_file, "SMS loop-with-not-single-set\n");
1349 set to 0 to save compile time. */
1684 NODE_ORDER. Also set aux.count of each node to ASAP.
2204 in failure and true in success. Bit N is set i
[all...]
H A Doptabs.c135 /* Add a REG_EQUAL note to the last insn in INSNS. TARGET is being set to
139 If the last insn does not set TARGET, don't do anything, but return 1.
148 rtx last_insn, insn, set;
168 set = single_set (last_insn);
169 if (set == NULL_RTX)
172 if (! rtx_equal_p (SET_DEST (set), target)
174 && (GET_CODE (SET_DEST (set)) != STRICT_LOW_PART
175 || ! rtx_equal_p (XEXP (SET_DEST (set), 0), target)))
233 /* Otherwise, get an object of MODE, clobber it, and set the low-order
886 and INTO_INPUT), then emit code to set u
147 rtx last_insn, insn, set; local
3198 no_conflict_move_test(rtx dest, rtx set, void *p0) argument
3460 rtx set = single_set (insn); local
[all...]
H A Dopts.c135 and set the flag variables. */
339 write_symbols is set to DBX_DEBUG, XCOFF_DEBUG, or DWARF_DEBUG. */
359 /* Used for bookkeeping on whether user set these flags so
703 contains has a single bit set representing the current
738 /* Parse command line options and set default flag values. Do minimal
903 /* Set this to a special "uninitialized" value. The actual default is set
943 /* The c_decode_option function and decode_option hook set
1455 Thus, if -Wextra has already been seen, set warn_unused_parameter;
1456 otherwise set maybe_warn_extra_parameter, which will be picked up
1464 /* Used to set th
1481 set_fast_math_flags(int set) argument
[all...]
H A Dpostreload.c28 #include "hard-reg-set.h"
75 /* See whether a single set SET is a noop. */
77 reload_cse_noop_set_p (rtx set) argument
79 if (cselib_reg_set_mode (SET_DEST (set)) != GET_MODE (SET_DEST (set)))
82 return rtx_equal_for_cselib_p (SET_DEST (set), SET_SRC (set));
215 /* Try to simplify a single SET instruction. SET is the set pattern.
217 This function only handles one case: if we set a register to a value
219 and change the set int
222 reload_cse_simplify_set(rtx set, rtx insn) argument
426 rtx set = single_set (insn); local
697 rtx insn, set; local
991 reload_combine_note_store(rtx dst, rtx set, void *data ATTRIBUTE_UNUSED) argument
1323 rtx set = NULL_RTX; local
1429 move2add_note_store(rtx dst, rtx set, void *data ATTRIBUTE_UNUSED) argument
[all...]
H A Drecog.c31 #include "hard-reg-set.h"
746 /* Return 1 if the insn using CC0 set by INSN does not contain
868 If PLOC is nonzero, *PLOC is set to the insn containing the single use.
1405 /* Single output operand: BODY is (set OUTPUT (asm_operands ...)). */
1414 body is [(set OUTPUT (asm_operands ...))... (clobber (reg ...))...]. */
1490 /* Single output operand: BODY is (set OUTPUT (asm_operands ....)). */
2254 etc. is obtained from the global variables set up by extract_insn.
2256 WHICH_ALTERNATIVE is set to a number which indicates which
2764 rtx set = single_set (insn);
2769 if (set
2751 rtx set = single_set (insn); local
2832 rtx set = single_set (insn); local
[all...]
H A Dreg-stack.c28 registers fully allocated to a set of "virtual" registers. Note that
84 1. Given a set of input regs that die in an asm_operands, it is
165 #include "hard-reg-set.h"
205 HARD_REG_SET reg_set; /* set of live registers */
1162 /* We're looking for a single set to cc0 or an HImode temporary. */
1246 set up. */
2929 rtx set;
2934 set = gen_rtx_SET (VOIDmode, FP_MODE_REG (reg, SFmode), not_a_num);
2935 insn = emit_insn_after (set, insn);
2996 BLOCK's successors was computed based on the initial edge set,
2910 rtx set; local
[all...]
/freebsd-11-stable/contrib/gcc/doc/include/
H A Dtexinfo.tex116 % Set up fixed words for English if not already set.
191 par-a-digms rath-er rec-tan-gu-lar ro-bot-ics se-vere-ly set-up spa-ces
283 \newdimen\outerhsize \newdimen\outervsize % set by the paper size routines
728 \endgraf % Not \par, as it may have been set to \lisppar.
1190 % can be set). So we test for \relax and 0 as well as \undefined,
1282 % We have to set dummies so commands such as @code, and characters
1480 % So we set up a \sf.
1663 % of just \STYLE. We do this because \STYLE needs to also set the
1665 % \tenSTYLE to set the current font.
1786 % @var is set t
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