Lines Matching refs:set
1236 If that's wrong, the solution is to test for it and set TARGET to 0
1302 /* Indicate for flow that the entire target reg is being set. */
2024 lowpart. Otherwise, shift to get the sign bits set properly. */
3068 we've set the inner register and must properly indicate
3836 rtx insn, set;
3865 Last comes code that finishes the operation. If QUOTIENT is set and
3866 REM_FLAG is set, the remainder is computed as OP0 - QUOTIENT * OP1. If
3867 QUOTIENT is not set, it is computed using trunc rounding.
3970 for a different constant. Then set the constant of the last
4057 /* Most significant bit of divisor is set; emit an scc
4149 && (set = single_set (insn)) != 0
4150 && SET_DEST (set) == quotient)
4222 && (set = single_set (insn)) != 0
4223 && SET_DEST (set) == quotient
4325 && (set = single_set (insn)) != 0
4326 && SET_DEST (set) == quotient)
4877 is set to the one of the two optabs that the call below will use. */
5218 /* From now on, we won't change CODE, so set ICODE now. */
5326 If STORE_FLAG_VALUE does not have the sign bit set when
5455 the sign bit set. */
5580 /* If this failed, we have to do this with set/compare/jump/set code. */