Searched refs:start (Results 176 - 200 of 931) sorted by relevance

1234567891011>>

/u-boot/board/renesas/rcar-common/
H A Dcommon.c116 if (curr_mem_res.end < first_mem_res.start)
119 if (curr_mem_res.start >= first_mem_res.end)
123 first_mem_res.start, first_mem_res.end,
124 curr_mem_res.start, curr_mem_res.end);
166 /* Delete duplicate node, start again */
/u-boot/arch/arm/mach-meson/
H A Dboard-common.c66 void meson_board_add_reserved_memory(void *fdt, u64 start, u64 size) argument
70 ret = fdt_add_mem_rsv(fdt, start, size);
72 printf("Could not reserve zone @ 0x%llx\n", start);
75 efi_add_memory_map(start, size, EFI_RESERVED_MEMORY_TYPE);
/u-boot/board/samsung/smdkv310/
H A Dsmdkv310.c60 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
63 gd->bd->bi_dram[1].start = PHYS_SDRAM_2;
66 gd->bd->bi_dram[2].start = PHYS_SDRAM_3;
69 gd->bd->bi_dram[3].start = PHYS_SDRAM_4;
/u-boot/drivers/i2c/muxes/
H A Di2c-arb-gpio-challenge.c44 unsigned start; local
49 start = get_timer(0);
81 } while (get_timer(start) < priv->wait_free_ms);
84 printf("I2C: Could not claim bus, timeout %lu\n", get_timer(start));
/u-boot/test/
H A Dstr_ut.c280 ulong start; local
283 start = ut_check_delta(0);
286 ut_assertok(ut_check_delta(start));
289 ut_assertok(ut_check_delta(start));
293 ut_assertok(ut_check_delta(start));
301 ut_assertok(ut_check_delta(start));
310 ut_assertok(ut_check_delta(start));
313 start = ut_check_delta(0);
320 ut_assertok(ut_check_delta(start));
331 ut_assertok(ut_check_delta(start));
[all...]
/u-boot/arch/x86/
H A DMakefile8 head-y := arch/x86/cpu/start.o
11 head-y := arch/x86/cpu/start.o
/u-boot/board/keymile/kmcent2/
H A Dddr.c21 #define DQSn_START(n, start) ((start) << DQSn_POS(n))
51 /* DQS write leveling start time according layout */
/u-boot/include/
H A Dcpu_func.h68 void flush_dcache_range(unsigned long start, unsigned long stop);
69 void invalidate_dcache_range(unsigned long start, unsigned long stop);
H A Dwait_bit.h46 unsigned long start = get_timer(0); \
57 if (get_timer(start) > timeout_ms) \
/u-boot/arch/powerpc/cpu/mpc8xx/
H A DMakefile6 extra-y += start.o
/u-boot/arch/arm/mach-tegra/
H A Dxusb-padctl-common.h89 return readl(padctl->regs.start + offset);
95 writel(value, padctl->regs.start + offset);
/u-boot/lib/acpi/
H A Dmcfg.c19 u16 seg_nr, u8 start, u8 end)
25 mmconfig->start_bus_number = start;
18 acpi_create_mcfg_mmconfig(struct acpi_mcfg_mmconfig *mmconfig, u32 base, u16 seg_nr, u8 start, u8 end) argument
/u-boot/drivers/mailbox/
H A Dzynqmp-ipi.c191 zynqmp->local_req_regs = devm_ioremap(dev, res.start,
192 (res.start - res.end));
200 zynqmp->local_res_regs = devm_ioremap(dev, res.start,
201 (res.start - res.end));
209 zynqmp->remote_req_regs = devm_ioremap(dev, res.start,
210 (res.start - res.end));
218 zynqmp->remote_res_regs = devm_ioremap(dev, res.start,
219 (res.start - res.end));
/u-boot/arch/x86/cpu/qemu/
H A Ddram.c55 gd->bd->bi_dram[0].start = 0;
60 gd->bd->bi_dram[1].start = SZ_4G;
/u-boot/post/drivers/
H A Dflash.c30 # error "invalid flash block start/end"
69 s_start = info->start[n];
71 s_off = s_start - info->start[0];
/u-boot/arch/riscv/cpu/andes/
H A Dcache.c49 void flush_dcache_range(unsigned long start, unsigned long end) argument
54 void invalidate_dcache_range(unsigned long start, unsigned long end) argument
/u-boot/lib/zstd/common/
H A Dbitstream.h86 const char* start; member in struct:__anon135
262 bitD->start = (const char*)srcBuffer;
263 bitD->limitPtr = bitD->start + sizeof(bitD->bitContainer);
272 bitD->ptr = bitD->start;
273 bitD->bitContainer = *(const BYTE*)(bitD->start);
306 MEM_STATIC FORCE_INLINE_ATTR size_t BIT_getUpperBits(size_t bitContainer, U32 const start) argument
308 return bitContainer >> start;
311 MEM_STATIC FORCE_INLINE_ATTR size_t BIT_getMiddleBits(size_t bitContainer, U32 const start, U32 const nbBits) argument
314 /* if start > regMask, bitstream is corrupted, and result is undefined */
322 return (bitContainer >> (start
[all...]
/u-boot/arch/arm/mach-rockchip/
H A Dsdram.c222 * If the start of the DDR_MEM tag is in a reserved
223 * memory area, move start address and resize.
246 * area with start address outside of reserved
262 gd->bd->bi_dram[j].start = start_addr;
282 gd->bd->bi_dram[j].start = start_addr;
305 gd->bd->bi_dram[0].start = 0x200000;
306 gd->bd->bi_dram[0].size = top - gd->bd->bi_dram[0].start;
310 gd->bd->bi_dram[1].start = SZ_4G;
311 gd->bd->bi_dram[1].size = ram_top - gd->bd->bi_dram[1].start;
321 gd->bd->bi_dram[0].start
[all...]
/u-boot/cmd/
H A Dflash.c38 * bank numbers start at 1 to be consistent with other specs, sector numbers
39 * start at zero.
111 sector_end_addr = info->start[0] +
114 sector_end_addr = info->start[i + 1] - 1;
117 if (*addr <= sector_end_addr && *addr >= info->start[i]) {
135 * This function computes the start and end addresses for both
138 * 1. <cmd> start end - operate on <'start', 'end')
139 * 2. <cmd> start +length - operate on <'start', star
[all...]
H A Dusb_mass_storage.c24 ulong start, lbaint_t blkcnt, void *buf)
27 lbaint_t blkstart = start + ums_dev->start_sector;
33 ulong start, lbaint_t blkcnt, const void *buf)
36 lbaint_t blkstart = start + ums_dev->start_sector;
101 ums[ums_count].start_sector = info.start;
23 ums_read_sector(struct ums *ums_dev, ulong start, lbaint_t blkcnt, void *buf) argument
32 ums_write_sector(struct ums *ums_dev, ulong start, lbaint_t blkcnt, const void *buf) argument
/u-boot/fs/yaffs2/
H A Dyaffs_nameval.c97 int start; local
106 start = nval_used(xb, xb_size);
107 space = xb_size - start + size_exist;
116 start = nval_used(xb, xb_size);
119 pos = start;
/u-boot/fs/ubifs/
H A Dmisc.h67 * @start: the zbranch index to start at
69 * This helper function looks for znode child starting at index @start. Returns
73 ubifs_tnc_find_child(struct ubifs_znode *znode, int start) argument
75 while (start < znode->child_cnt) {
76 if (znode->zbranch[start].znode)
77 return znode->zbranch[start].znode;
78 start += 1;
/u-boot/drivers/demo/
H A Ddemo-shape.c35 int start; member in struct:shape
63 inside = pos >= shape.start && pos < shape.end;
75 shape.start += shape.dstart;
77 if (shape.start < 0) {
80 shape.start += shape.dstart;
/u-boot/arch/arm/mach-socfpga/
H A Dmisc_arria10.c97 /* Configure the L2 controller to make SDRAM start at 0 */
253 u32 start, size; local
270 start = bd->bi_dram[bank].start >> MMU_SECTION_SHIFT;
272 for (i = start; i < start + size; i++)
/u-boot/drivers/ddr/altera/
H A Dsdram_soc64.c143 unsigned int start = get_timer(0); local
147 start_addr = bd->bi_dram[0].start;
171 start_addr = bd->bi_dram[bank].start;
179 (unsigned int)get_timer(start));
186 phys_addr_t start = 0; local
194 start = bd->bi_dram[bank].start;
206 (start + ram_check), size);
265 value = bd->bi_dram[i].start;
292 value = bd->bi_dram[i].start
[all...]

Completed in 439 milliseconds

1234567891011>>