| /u-boot/arch/arm/lib/ |
| H A D | uldivmod.S | 13 * B, R = r2 + (r3 << 32)
19 B_0 .req r2
28 R_0 .req r2
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| /u-boot/common/ |
| H A D | bootstage.c | 258 static int h_compare_record(const void *r1, const void *r2) argument
260 const struct bootstage_record *rec1 = r1, *rec2 = r2;
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| /u-boot/arch/arm/mach-uniphier/arm32/ |
| H A D | debug_ll.S | 169 addruart r0, r1, r2
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| /u-boot/drivers/pinctrl/nuvoton/ |
| H A D | pinctrl-npcm7xx.c | 365 NPCM7XX_GRP(r2), \
516 NPCM7XX_SFUNC(r2); variable
642 NPCM7XX_MKFUNC(r2),
797 NPCM7XX_PINCFG(84, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW),
798 NPCM7XX_PINCFG(85, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW),
799 NPCM7XX_PINCFG(86, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, DS(8, 12) | SLEW),
800 NPCM7XX_PINCFG(87, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, 0),
801 NPCM7XX_PINCFG(88, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, 0),
802 NPCM7XX_PINCFG(89, r2, MFSEL1, 14, none, NONE, 0, none, NONE, 0, 0),
917 NPCM7XX_PINCFG(200, r2, MFSEL
[all...] |
| H A D | pinctrl-npcm8xx.c | 79 FUNC(r2, MFSEL1, 14, 84, 85, 86, 87, 88, 89, 200) \
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| /u-boot/drivers/pinctrl/renesas/ |
| H A D | sh_pfc.h | 172 #define PINMUX_BIAS_REG(name1, r1, name2, r2) \
174 .pud = r2, \
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| /u-boot/drivers/clk/renesas/ |
| H A D | r9a06g032-clocks.c | 104 * @sel: select either g1/r1 or g2/r2 as clock source
108 * @r2: 2nd source reset (module reset)
135 struct regbit sel, g1, r1, g2, r2; member in struct:r9a06g032_clkdesc::__anon9::__anon12
203 .r2 = _r2 \
907 struct regbit reset[2] = { desc->dual.r1, desc->dual.r2 };
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| /u-boot/arch/arm/dts/ |
| H A D | Makefile | 1225 mt7623n-bananapi-bpi-r2.dtb \
1266 dtb-$(CONFIG_TARGET_VEXPRESS64_JUNO) += juno-r2.dtb
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| /u-boot/scripts/ |
| H A D | checkpatch.pl | 7152 my $r2 = $a2;
7155 $r2 = $a1;
7157 if ($r1 !~ /^sizeof\b/ && $r2 =~ /^sizeof\s*\S/ &&
7166 $fixed[$fixlinenr] =~ s/\b($Lval)\s*\=\s*(?:$balanced_parens)?\s*(k[mz]alloc)\s*\(\s*($FuncArg)\s*\*\s*($FuncArg)/$1 . ' = ' . "$newfunc(" . trim($r1) . ', ' . trim($r2)/e;
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